1 Device-Tree bindings for DesignWare DSI Host C 1 Device-Tree bindings for DesignWare DSI Host Controller v1.20a driver
2 2
3 A DSI Host Controller resides in the middle of 3 A DSI Host Controller resides in the middle of display controller and external
4 HDMI converter or panel. 4 HDMI converter or panel.
5 5
6 Required properties: 6 Required properties:
7 - compatible: value should be "hisilicon,hi622 7 - compatible: value should be "hisilicon,hi6220-dsi".
8 - reg: physical base address and length of dsi 8 - reg: physical base address and length of dsi controller's registers.
9 - clocks: contains APB clock phandle + clock-s 9 - clocks: contains APB clock phandle + clock-specifier pair.
10 - clock-names: should be "pclk". 10 - clock-names: should be "pclk".
11 - ports: contains DSI controller input and out 11 - ports: contains DSI controller input and output sub port.
12 The input port connects to ADE output port w 12 The input port connects to ADE output port with the reg value "0".
13 The output port with the reg value "1", it c 13 The output port with the reg value "1", it could connect to panel or
14 any other bridge endpoints. 14 any other bridge endpoints.
15 See Documentation/devicetree/bindings/graph. 15 See Documentation/devicetree/bindings/graph.txt for more device graph info.
16 16
17 A example of HiKey board hi6220 SoC and board 17 A example of HiKey board hi6220 SoC and board specific DT entry:
18 Example: 18 Example:
19 19
20 SoC specific: 20 SoC specific:
21 dsi: dsi@f4107800 { 21 dsi: dsi@f4107800 {
22 compatible = "hisilicon,hi6220 22 compatible = "hisilicon,hi6220-dsi";
23 reg = <0x0 0xf4107800 0x0 0x10 23 reg = <0x0 0xf4107800 0x0 0x100>;
24 clocks = <&media_ctrl HI6220_ 24 clocks = <&media_ctrl HI6220_DSI_PCLK>;
25 clock-names = "pclk"; 25 clock-names = "pclk";
26 status = "disabled"; 26 status = "disabled";
27 27
28 ports { 28 ports {
29 #address-cells = <1>; 29 #address-cells = <1>;
30 #size-cells = <0>; 30 #size-cells = <0>;
31 31
32 /* 0 for input port */ 32 /* 0 for input port */
33 port@0 { 33 port@0 {
34 reg = <0>; 34 reg = <0>;
35 dsi_in: endpoi 35 dsi_in: endpoint {
36 remote 36 remote-endpoint = <&ade_out>;
37 }; 37 };
38 }; 38 };
39 }; 39 };
40 }; 40 };
41 41
42 42
43 Board specific: 43 Board specific:
44 &dsi { 44 &dsi {
45 status = "ok"; 45 status = "ok";
46 46
47 ports { 47 ports {
48 /* 1 for output port * 48 /* 1 for output port */
49 port@1 { 49 port@1 {
50 reg = <1>; 50 reg = <1>;
51 51
52 dsi_out0: endp 52 dsi_out0: endpoint@0 {
53 remote 53 remote-endpoint = <&adv7533_in>;
54 }; 54 };
55 }; 55 };
56 }; 56 };
57 }; 57 };
58 58
59 &i2c2 { 59 &i2c2 {
60 ... 60 ...
61 61
62 adv7533: adv7533@39 { 62 adv7533: adv7533@39 {
63 ... 63 ...
64 64
65 port { 65 port {
66 adv7533_in: en 66 adv7533_in: endpoint {
67 remote 67 remote-endpoint = <&dsi_out0>;
68 }; 68 };
69 }; 69 };
70 }; 70 };
71 }; 71 };
72 72
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