1 # SPDX-License-Identifier: (GPL-2.0-only OR BS 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2 %YAML 1.2 2 %YAML 1.2
3 --- 3 ---
4 $id: http://devicetree.org/schemas/display/imx 4 $id: http://devicetree.org/schemas/display/imx/fsl,imx8mp-hdmi-pvi.yaml#
5 $schema: http://devicetree.org/meta-schemas/co 5 $schema: http://devicetree.org/meta-schemas/core.yaml#
6 6
7 title: Freescale i.MX8MP HDMI Parallel Video I 7 title: Freescale i.MX8MP HDMI Parallel Video Interface
8 8
9 maintainers: 9 maintainers:
10 - Lucas Stach <l.stach@pengutronix.de> 10 - Lucas Stach <l.stach@pengutronix.de>
11 11
12 description: 12 description:
13 The HDMI parallel video interface is a timin 13 The HDMI parallel video interface is a timing and sync generator block in the
14 i.MX8MP SoC, that sits between the video sou 14 i.MX8MP SoC, that sits between the video source and the HDMI TX controller.
15 15
16 properties: 16 properties:
17 compatible: 17 compatible:
18 const: fsl,imx8mp-hdmi-pvi 18 const: fsl,imx8mp-hdmi-pvi
19 19
20 reg: 20 reg:
21 maxItems: 1 21 maxItems: 1
22 22
23 interrupts: 23 interrupts:
24 maxItems: 1 24 maxItems: 1
25 25
26 power-domains: 26 power-domains:
27 maxItems: 1 27 maxItems: 1
28 28
29 ports: 29 ports:
30 $ref: /schemas/graph.yaml#/properties/port 30 $ref: /schemas/graph.yaml#/properties/ports
31 31
32 properties: 32 properties:
33 port@0: 33 port@0:
34 $ref: /schemas/graph.yaml#/properties/ 34 $ref: /schemas/graph.yaml#/properties/port
35 description: Input from the LCDIF cont 35 description: Input from the LCDIF controller.
36 36
37 port@1: 37 port@1:
38 $ref: /schemas/graph.yaml#/properties/ 38 $ref: /schemas/graph.yaml#/properties/port
39 description: Output to the HDMI TX con 39 description: Output to the HDMI TX controller.
40 40
41 required: 41 required:
42 - port@0 42 - port@0
43 - port@1 43 - port@1
44 44
45 required: 45 required:
46 - compatible 46 - compatible
47 - reg 47 - reg
48 - interrupts 48 - interrupts
49 - power-domains 49 - power-domains
50 - ports 50 - ports
51 51
52 additionalProperties: false 52 additionalProperties: false
53 53
54 examples: 54 examples:
55 - | 55 - |
56 #include <dt-bindings/interrupt-controller 56 #include <dt-bindings/interrupt-controller/irq.h>
57 #include <dt-bindings/power/imx8mp-power.h 57 #include <dt-bindings/power/imx8mp-power.h>
58 58
59 display-bridge@32fc4000 { 59 display-bridge@32fc4000 {
60 compatible = "fsl,imx8mp-hdmi-pvi"; 60 compatible = "fsl,imx8mp-hdmi-pvi";
61 reg = <0x32fc4000 0x44>; 61 reg = <0x32fc4000 0x44>;
62 interrupt-parent = <&irqsteer_hdmi>; 62 interrupt-parent = <&irqsteer_hdmi>;
63 interrupts = <12 IRQ_TYPE_LEVEL_HIGH>; 63 interrupts = <12 IRQ_TYPE_LEVEL_HIGH>;
64 power-domains = <&hdmi_blk_ctrl IMX8MP 64 power-domains = <&hdmi_blk_ctrl IMX8MP_HDMIBLK_PD_PVI>;
65 65
66 ports { 66 ports {
67 #address-cells = <1>; 67 #address-cells = <1>;
68 #size-cells = <0>; 68 #size-cells = <0>;
69 69
70 port@0 { 70 port@0 {
71 reg = <0>; 71 reg = <0>;
72 pvi_from_lcdif3: endpoint { 72 pvi_from_lcdif3: endpoint {
73 remote-endpoint = <&lcdif3 73 remote-endpoint = <&lcdif3_to_pvi>;
74 }; 74 };
75 }; 75 };
76 76
77 port@1 { 77 port@1 {
78 reg = <1>; 78 reg = <1>;
79 pvi_to_hdmi_tx: endpoint { 79 pvi_to_hdmi_tx: endpoint {
80 remote-endpoint = <&hdmi_t 80 remote-endpoint = <&hdmi_tx_from_pvi>;
81 }; 81 };
82 }; 82 };
83 }; 83 };
84 }; 84 };
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