1 # SPDX-License-Identifier: (GPL-2.0-only OR BS 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2 %YAML 1.2 2 %YAML 1.2
3 --- 3 ---
4 $id: http://devicetree.org/schemas/display/msm 4 $id: http://devicetree.org/schemas/display/msm/dp-controller.yaml#
5 $schema: http://devicetree.org/meta-schemas/co 5 $schema: http://devicetree.org/meta-schemas/core.yaml#
6 6
7 title: MSM Display Port Controller 7 title: MSM Display Port Controller
8 8
9 maintainers: 9 maintainers:
10 - Kuogee Hsieh <quic_khsieh@quicinc.com> !! 10 - Kuogee Hsieh <khsieh@codeaurora.org>
11 11
12 description: | 12 description: |
13 Device tree bindings for DisplayPort host co 13 Device tree bindings for DisplayPort host controller for MSM targets
14 that are compatible with VESA DisplayPort in 14 that are compatible with VESA DisplayPort interface specification.
15 15
16 properties: 16 properties:
17 compatible: 17 compatible:
18 oneOf: !! 18 enum:
19 - enum: !! 19 - qcom,sc7180-dp
20 - qcom,sc7180-dp !! 20 - qcom,sc7280-dp
21 - qcom,sc7280-dp !! 21 - qcom,sc7280-edp
22 - qcom,sc7280-edp !! 22 - qcom,sc8180x-dp
23 - qcom,sc8180x-dp !! 23 - qcom,sc8180x-edp
24 - qcom,sc8180x-edp <<
25 - qcom,sc8280xp-dp <<
26 - qcom,sc8280xp-edp <<
27 - qcom,sdm845-dp <<
28 - qcom,sm8350-dp <<
29 - qcom,sm8650-dp <<
30 - items: <<
31 - enum: <<
32 - qcom,sm6350-dp <<
33 - qcom,sm8150-dp <<
34 - qcom,sm8250-dp <<
35 - qcom,sm8450-dp <<
36 - qcom,sm8550-dp <<
37 - const: qcom,sm8350-dp <<
38 24
39 reg: 25 reg:
40 minItems: 4 <<
41 items: 26 items:
42 - description: ahb register block 27 - description: ahb register block
43 - description: aux register block 28 - description: aux register block
44 - description: link register block 29 - description: link register block
45 - description: p0 register block 30 - description: p0 register block
46 - description: p1 register block 31 - description: p1 register block
47 32
48 interrupts: 33 interrupts:
49 maxItems: 1 34 maxItems: 1
50 35
51 clocks: 36 clocks:
52 items: 37 items:
53 - description: AHB clock to enable regis 38 - description: AHB clock to enable register access
54 - description: Display Port AUX clock 39 - description: Display Port AUX clock
55 - description: Display Port Link clock 40 - description: Display Port Link clock
56 - description: Link interface clock betw 41 - description: Link interface clock between DP and PHY
57 - description: Display Port Pixel clock 42 - description: Display Port Pixel clock
58 43
59 clock-names: 44 clock-names:
60 items: 45 items:
61 - const: core_iface 46 - const: core_iface
62 - const: core_aux 47 - const: core_aux
63 - const: ctrl_link 48 - const: ctrl_link
64 - const: ctrl_link_iface 49 - const: ctrl_link_iface
65 - const: stream_pixel 50 - const: stream_pixel
66 51
67 assigned-clocks: 52 assigned-clocks:
68 items: 53 items:
69 - description: link clock source 54 - description: link clock source
70 - description: pixel clock source 55 - description: pixel clock source
71 56
72 assigned-clock-parents: 57 assigned-clock-parents:
73 items: 58 items:
74 - description: phy 0 parent 59 - description: phy 0 parent
75 - description: phy 1 parent 60 - description: phy 1 parent
76 61
77 phys: 62 phys:
78 maxItems: 1 63 maxItems: 1
79 64
80 phy-names: 65 phy-names:
81 items: 66 items:
82 - const: dp 67 - const: dp
83 68
84 operating-points-v2: true !! 69 operating-points-v2:
85 !! 70 maxItems: 1
86 opp-table: <<
87 type: object <<
88 71
89 power-domains: 72 power-domains:
90 maxItems: 1 73 maxItems: 1
91 74
92 aux-bus: <<
93 $ref: /schemas/display/dp-aux-bus.yaml# <<
94 <<
95 data-lanes: <<
96 $ref: /schemas/types.yaml#/definitions/uin <<
97 deprecated: true <<
98 minItems: 1 <<
99 maxItems: 4 <<
100 items: <<
101 maximum: 3 <<
102 <<
103 "#sound-dai-cells": 75 "#sound-dai-cells":
104 const: 0 76 const: 0
105 77
106 vdda-0p9-supply: <<
107 deprecated: true <<
108 vdda-1p2-supply: <<
109 deprecated: true <<
110 <<
111 ports: 78 ports:
112 $ref: /schemas/graph.yaml#/properties/port 79 $ref: /schemas/graph.yaml#/properties/ports
113 properties: 80 properties:
114 port@0: 81 port@0:
115 $ref: /schemas/graph.yaml#/properties/ 82 $ref: /schemas/graph.yaml#/properties/port
116 description: Input endpoint of the con 83 description: Input endpoint of the controller
117 84
118 port@1: 85 port@1:
119 $ref: /schemas/graph.yaml#/$defs/port- !! 86 $ref: /schemas/graph.yaml#/properties/port
120 unevaluatedProperties: false <<
121 description: Output endpoint of the co 87 description: Output endpoint of the controller
122 properties: <<
123 endpoint: <<
124 $ref: /schemas/media/video-interfa <<
125 unevaluatedProperties: false <<
126 properties: <<
127 data-lanes: <<
128 minItems: 1 <<
129 maxItems: 4 <<
130 items: <<
131 enum: [ 0, 1, 2, 3 ] <<
132 <<
133 link-frequencies: <<
134 minItems: 1 <<
135 maxItems: 4 <<
136 items: <<
137 enum: [ 1620000000, 27000000 <<
138 <<
139 required: <<
140 - port@0 <<
141 - port@1 <<
142 88
143 required: 89 required:
144 - compatible 90 - compatible
145 - reg 91 - reg
146 - interrupts 92 - interrupts
147 - clocks 93 - clocks
148 - clock-names 94 - clock-names
149 - phys 95 - phys
150 - phy-names 96 - phy-names
>> 97 - "#sound-dai-cells"
151 - power-domains 98 - power-domains
152 - ports 99 - ports
153 100
154 allOf: <<
155 # AUX BUS does not exist on DP controllers <<
156 # Audio output also is present only on DP ou <<
157 # p1 regions is present on DP, but not on eD <<
158 - if: <<
159 properties: <<
160 compatible: <<
161 contains: <<
162 enum: <<
163 - qcom,sc7280-edp <<
164 - qcom,sc8180x-edp <<
165 - qcom,sc8280xp-edp <<
166 then: <<
167 properties: <<
168 "#sound-dai-cells": false <<
169 else: <<
170 properties: <<
171 aux-bus: false <<
172 reg: <<
173 minItems: 5 <<
174 required: <<
175 - "#sound-dai-cells" <<
176 <<
177 additionalProperties: false 101 additionalProperties: false
178 102
179 examples: 103 examples:
180 - | 104 - |
181 #include <dt-bindings/interrupt-controller 105 #include <dt-bindings/interrupt-controller/arm-gic.h>
182 #include <dt-bindings/clock/qcom,dispcc-sc 106 #include <dt-bindings/clock/qcom,dispcc-sc7180.h>
183 #include <dt-bindings/power/qcom-rpmpd.h> 107 #include <dt-bindings/power/qcom-rpmpd.h>
184 108
185 displayport-controller@ae90000 { 109 displayport-controller@ae90000 {
186 compatible = "qcom,sc7180-dp"; 110 compatible = "qcom,sc7180-dp";
187 reg = <0xae90000 0x200>, 111 reg = <0xae90000 0x200>,
188 <0xae90200 0x200>, 112 <0xae90200 0x200>,
189 <0xae90400 0xc00>, 113 <0xae90400 0xc00>,
190 <0xae91000 0x400>, 114 <0xae91000 0x400>,
191 <0xae91400 0x400>; 115 <0xae91400 0x400>;
192 interrupt-parent = <&mdss>; 116 interrupt-parent = <&mdss>;
193 interrupts = <12>; 117 interrupts = <12>;
194 clocks = <&dispcc DISP_CC_MDSS_AHB_CLK 118 clocks = <&dispcc DISP_CC_MDSS_AHB_CLK>,
195 <&dispcc DISP_CC_MDSS_DP_AUX_ 119 <&dispcc DISP_CC_MDSS_DP_AUX_CLK>,
196 <&dispcc DISP_CC_MDSS_DP_LINK 120 <&dispcc DISP_CC_MDSS_DP_LINK_CLK>,
197 <&dispcc DISP_CC_MDSS_DP_LINK 121 <&dispcc DISP_CC_MDSS_DP_LINK_INTF_CLK>,
198 <&dispcc DISP_CC_MDSS_DP_PIXE 122 <&dispcc DISP_CC_MDSS_DP_PIXEL_CLK>;
199 clock-names = "core_iface", "core_aux" 123 clock-names = "core_iface", "core_aux",
200 "ctrl_link", 124 "ctrl_link",
201 "ctrl_link_iface", "stre 125 "ctrl_link_iface", "stream_pixel";
202 126
203 assigned-clocks = <&dispcc DISP_CC_MDS 127 assigned-clocks = <&dispcc DISP_CC_MDSS_DP_LINK_CLK_SRC>,
204 <&dispcc DISP_CC_MDS 128 <&dispcc DISP_CC_MDSS_DP_PIXEL_CLK_SRC>;
205 129
206 assigned-clock-parents = <&dp_phy 0>, 130 assigned-clock-parents = <&dp_phy 0>, <&dp_phy 1>;
207 131
208 phys = <&dp_phy>; 132 phys = <&dp_phy>;
209 phy-names = "dp"; 133 phy-names = "dp";
210 134
211 #sound-dai-cells = <0>; 135 #sound-dai-cells = <0>;
212 136
213 power-domains = <&rpmhpd SC7180_CX>; 137 power-domains = <&rpmhpd SC7180_CX>;
214 138
215 ports { 139 ports {
216 #address-cells = <1>; 140 #address-cells = <1>;
217 #size-cells = <0>; 141 #size-cells = <0>;
218 142
219 port@0 { 143 port@0 {
220 reg = <0>; 144 reg = <0>;
221 endpoint { 145 endpoint {
222 remote-endpoint = <&dpu_in 146 remote-endpoint = <&dpu_intf0_out>;
223 }; 147 };
224 }; 148 };
225 149
226 port@1 { 150 port@1 {
227 reg = <1>; 151 reg = <1>;
228 endpoint { 152 endpoint {
229 remote-endpoint = <&typec> 153 remote-endpoint = <&typec>;
230 data-lanes = <0 1>; <<
231 link-frequencies = /bits/ <<
232 }; 154 };
233 }; 155 };
234 }; 156 };
235 }; 157 };
236 ... 158 ...
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