1 # SPDX-License-Identifier: (GPL-2.0-only OR BS 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2 %YAML 1.2 2 %YAML 1.2
3 --- 3 ---
4 $id: http://devicetree.org/schemas/display/msm 4 $id: http://devicetree.org/schemas/display/msm/dp-controller.yaml#
5 $schema: http://devicetree.org/meta-schemas/co 5 $schema: http://devicetree.org/meta-schemas/core.yaml#
6 6
7 title: MSM Display Port Controller 7 title: MSM Display Port Controller
8 8
9 maintainers: 9 maintainers:
10 - Kuogee Hsieh <quic_khsieh@quicinc.com> 10 - Kuogee Hsieh <quic_khsieh@quicinc.com>
11 11
12 description: | 12 description: |
13 Device tree bindings for DisplayPort host co 13 Device tree bindings for DisplayPort host controller for MSM targets
14 that are compatible with VESA DisplayPort in 14 that are compatible with VESA DisplayPort interface specification.
15 15
16 properties: 16 properties:
17 compatible: 17 compatible:
18 oneOf: !! 18 enum:
19 - enum: !! 19 - qcom,sc7180-dp
20 - qcom,sc7180-dp !! 20 - qcom,sc7280-dp
21 - qcom,sc7280-dp !! 21 - qcom,sc7280-edp
22 - qcom,sc7280-edp !! 22 - qcom,sc8180x-dp
23 - qcom,sc8180x-dp !! 23 - qcom,sc8180x-edp
24 - qcom,sc8180x-edp !! 24 - qcom,sm8350-dp
25 - qcom,sc8280xp-dp <<
26 - qcom,sc8280xp-edp <<
27 - qcom,sdm845-dp <<
28 - qcom,sm8350-dp <<
29 - qcom,sm8650-dp <<
30 - items: <<
31 - enum: <<
32 - qcom,sm6350-dp <<
33 - qcom,sm8150-dp <<
34 - qcom,sm8250-dp <<
35 - qcom,sm8450-dp <<
36 - qcom,sm8550-dp <<
37 - const: qcom,sm8350-dp <<
38 25
39 reg: 26 reg:
40 minItems: 4 27 minItems: 4
41 items: 28 items:
42 - description: ahb register block 29 - description: ahb register block
43 - description: aux register block 30 - description: aux register block
44 - description: link register block 31 - description: link register block
45 - description: p0 register block 32 - description: p0 register block
46 - description: p1 register block 33 - description: p1 register block
47 34
48 interrupts: 35 interrupts:
49 maxItems: 1 36 maxItems: 1
50 37
51 clocks: 38 clocks:
52 items: 39 items:
53 - description: AHB clock to enable regis 40 - description: AHB clock to enable register access
54 - description: Display Port AUX clock 41 - description: Display Port AUX clock
55 - description: Display Port Link clock 42 - description: Display Port Link clock
56 - description: Link interface clock betw 43 - description: Link interface clock between DP and PHY
57 - description: Display Port Pixel clock 44 - description: Display Port Pixel clock
58 45
59 clock-names: 46 clock-names:
60 items: 47 items:
61 - const: core_iface 48 - const: core_iface
62 - const: core_aux 49 - const: core_aux
63 - const: ctrl_link 50 - const: ctrl_link
64 - const: ctrl_link_iface 51 - const: ctrl_link_iface
65 - const: stream_pixel 52 - const: stream_pixel
66 53
67 assigned-clocks: 54 assigned-clocks:
68 items: 55 items:
69 - description: link clock source 56 - description: link clock source
70 - description: pixel clock source 57 - description: pixel clock source
71 58
72 assigned-clock-parents: 59 assigned-clock-parents:
73 items: 60 items:
74 - description: phy 0 parent 61 - description: phy 0 parent
75 - description: phy 1 parent 62 - description: phy 1 parent
76 63
77 phys: 64 phys:
78 maxItems: 1 65 maxItems: 1
79 66
80 phy-names: 67 phy-names:
81 items: 68 items:
82 - const: dp 69 - const: dp
83 70
84 operating-points-v2: true !! 71 operating-points-v2:
>> 72 maxItems: 1
85 73
86 opp-table: !! 74 opp-table: true
87 type: object <<
88 75
89 power-domains: 76 power-domains:
90 maxItems: 1 77 maxItems: 1
91 78
92 aux-bus: 79 aux-bus:
93 $ref: /schemas/display/dp-aux-bus.yaml# 80 $ref: /schemas/display/dp-aux-bus.yaml#
94 81
95 data-lanes: 82 data-lanes:
96 $ref: /schemas/types.yaml#/definitions/uin 83 $ref: /schemas/types.yaml#/definitions/uint32-array
97 deprecated: true <<
98 minItems: 1 84 minItems: 1
99 maxItems: 4 85 maxItems: 4
100 items: 86 items:
101 maximum: 3 87 maximum: 3
102 88
103 "#sound-dai-cells": 89 "#sound-dai-cells":
104 const: 0 90 const: 0
105 91
106 vdda-0p9-supply: 92 vdda-0p9-supply:
107 deprecated: true 93 deprecated: true
108 vdda-1p2-supply: 94 vdda-1p2-supply:
109 deprecated: true 95 deprecated: true
110 96
111 ports: 97 ports:
112 $ref: /schemas/graph.yaml#/properties/port 98 $ref: /schemas/graph.yaml#/properties/ports
113 properties: 99 properties:
114 port@0: 100 port@0:
115 $ref: /schemas/graph.yaml#/properties/ 101 $ref: /schemas/graph.yaml#/properties/port
116 description: Input endpoint of the con 102 description: Input endpoint of the controller
117 103
118 port@1: 104 port@1:
119 $ref: /schemas/graph.yaml#/$defs/port- !! 105 $ref: /schemas/graph.yaml#/properties/port
120 unevaluatedProperties: false <<
121 description: Output endpoint of the co 106 description: Output endpoint of the controller
122 properties: <<
123 endpoint: <<
124 $ref: /schemas/media/video-interfa <<
125 unevaluatedProperties: false <<
126 properties: <<
127 data-lanes: <<
128 minItems: 1 <<
129 maxItems: 4 <<
130 items: <<
131 enum: [ 0, 1, 2, 3 ] <<
132 <<
133 link-frequencies: <<
134 minItems: 1 <<
135 maxItems: 4 <<
136 items: <<
137 enum: [ 1620000000, 27000000 <<
138 <<
139 required: <<
140 - port@0 <<
141 - port@1 <<
142 107
143 required: 108 required:
144 - compatible 109 - compatible
145 - reg 110 - reg
146 - interrupts 111 - interrupts
147 - clocks 112 - clocks
148 - clock-names 113 - clock-names
149 - phys 114 - phys
150 - phy-names 115 - phy-names
151 - power-domains 116 - power-domains
152 - ports 117 - ports
153 118
154 allOf: 119 allOf:
155 # AUX BUS does not exist on DP controllers 120 # AUX BUS does not exist on DP controllers
156 # Audio output also is present only on DP ou 121 # Audio output also is present only on DP output
157 # p1 regions is present on DP, but not on eD 122 # p1 regions is present on DP, but not on eDP
158 - if: 123 - if:
159 properties: 124 properties:
160 compatible: 125 compatible:
161 contains: 126 contains:
162 enum: 127 enum:
163 - qcom,sc7280-edp 128 - qcom,sc7280-edp
164 - qcom,sc8180x-edp 129 - qcom,sc8180x-edp
165 - qcom,sc8280xp-edp <<
166 then: 130 then:
167 properties: 131 properties:
168 "#sound-dai-cells": false 132 "#sound-dai-cells": false
>> 133 reg:
>> 134 maxItems: 4
169 else: 135 else:
170 properties: 136 properties:
171 aux-bus: false 137 aux-bus: false
172 reg: 138 reg:
173 minItems: 5 139 minItems: 5
174 required: 140 required:
175 - "#sound-dai-cells" 141 - "#sound-dai-cells"
176 142
177 additionalProperties: false 143 additionalProperties: false
178 144
179 examples: 145 examples:
180 - | 146 - |
181 #include <dt-bindings/interrupt-controller 147 #include <dt-bindings/interrupt-controller/arm-gic.h>
182 #include <dt-bindings/clock/qcom,dispcc-sc 148 #include <dt-bindings/clock/qcom,dispcc-sc7180.h>
183 #include <dt-bindings/power/qcom-rpmpd.h> 149 #include <dt-bindings/power/qcom-rpmpd.h>
184 150
185 displayport-controller@ae90000 { 151 displayport-controller@ae90000 {
186 compatible = "qcom,sc7180-dp"; 152 compatible = "qcom,sc7180-dp";
187 reg = <0xae90000 0x200>, 153 reg = <0xae90000 0x200>,
188 <0xae90200 0x200>, 154 <0xae90200 0x200>,
189 <0xae90400 0xc00>, 155 <0xae90400 0xc00>,
190 <0xae91000 0x400>, 156 <0xae91000 0x400>,
191 <0xae91400 0x400>; 157 <0xae91400 0x400>;
192 interrupt-parent = <&mdss>; 158 interrupt-parent = <&mdss>;
193 interrupts = <12>; 159 interrupts = <12>;
194 clocks = <&dispcc DISP_CC_MDSS_AHB_CLK 160 clocks = <&dispcc DISP_CC_MDSS_AHB_CLK>,
195 <&dispcc DISP_CC_MDSS_DP_AUX_ 161 <&dispcc DISP_CC_MDSS_DP_AUX_CLK>,
196 <&dispcc DISP_CC_MDSS_DP_LINK 162 <&dispcc DISP_CC_MDSS_DP_LINK_CLK>,
197 <&dispcc DISP_CC_MDSS_DP_LINK 163 <&dispcc DISP_CC_MDSS_DP_LINK_INTF_CLK>,
198 <&dispcc DISP_CC_MDSS_DP_PIXE 164 <&dispcc DISP_CC_MDSS_DP_PIXEL_CLK>;
199 clock-names = "core_iface", "core_aux" 165 clock-names = "core_iface", "core_aux",
200 "ctrl_link", 166 "ctrl_link",
201 "ctrl_link_iface", "stre 167 "ctrl_link_iface", "stream_pixel";
202 168
203 assigned-clocks = <&dispcc DISP_CC_MDS 169 assigned-clocks = <&dispcc DISP_CC_MDSS_DP_LINK_CLK_SRC>,
204 <&dispcc DISP_CC_MDS 170 <&dispcc DISP_CC_MDSS_DP_PIXEL_CLK_SRC>;
205 171
206 assigned-clock-parents = <&dp_phy 0>, 172 assigned-clock-parents = <&dp_phy 0>, <&dp_phy 1>;
207 173
208 phys = <&dp_phy>; 174 phys = <&dp_phy>;
209 phy-names = "dp"; 175 phy-names = "dp";
210 176
211 #sound-dai-cells = <0>; 177 #sound-dai-cells = <0>;
212 178
213 power-domains = <&rpmhpd SC7180_CX>; 179 power-domains = <&rpmhpd SC7180_CX>;
214 180
215 ports { 181 ports {
216 #address-cells = <1>; 182 #address-cells = <1>;
217 #size-cells = <0>; 183 #size-cells = <0>;
218 184
219 port@0 { 185 port@0 {
220 reg = <0>; 186 reg = <0>;
221 endpoint { 187 endpoint {
222 remote-endpoint = <&dpu_in 188 remote-endpoint = <&dpu_intf0_out>;
223 }; 189 };
224 }; 190 };
225 191
226 port@1 { 192 port@1 {
227 reg = <1>; 193 reg = <1>;
228 endpoint { 194 endpoint {
229 remote-endpoint = <&typec> 195 remote-endpoint = <&typec>;
230 data-lanes = <0 1>; <<
231 link-frequencies = /bits/ <<
232 }; 196 };
233 }; 197 };
234 }; 198 };
235 }; 199 };
236 ... 200 ...
Linux® is a registered trademark of Linus Torvalds in the United States and other countries.
TOMOYO® is a registered trademark of NTT DATA CORPORATION.