1 # SPDX-License-Identifier: GPL-2.0-only OR BSD 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
2 %YAML 1.2 2 %YAML 1.2
3 --- 3 ---
4 $id: http://devicetree.org/schemas/display/msm 4 $id: http://devicetree.org/schemas/display/msm/dsi-controller-main.yaml#
5 $schema: http://devicetree.org/meta-schemas/co 5 $schema: http://devicetree.org/meta-schemas/core.yaml#
6 6
7 title: Qualcomm Display DSI controller 7 title: Qualcomm Display DSI controller
8 8
9 maintainers: 9 maintainers:
10 - Krishna Manikandan <quic_mkrishn@quicinc.co 10 - Krishna Manikandan <quic_mkrishn@quicinc.com>
11 11
12 properties: 12 properties:
13 compatible: 13 compatible:
14 oneOf: 14 oneOf:
15 - items: 15 - items:
16 - enum: 16 - enum:
17 - qcom,apq8064-dsi-ctrl 17 - qcom,apq8064-dsi-ctrl
18 - qcom,msm8226-dsi-ctrl 18 - qcom,msm8226-dsi-ctrl
19 - qcom,msm8916-dsi-ctrl 19 - qcom,msm8916-dsi-ctrl
20 - qcom,msm8953-dsi-ctrl 20 - qcom,msm8953-dsi-ctrl
21 - qcom,msm8974-dsi-ctrl 21 - qcom,msm8974-dsi-ctrl
22 - qcom,msm8976-dsi-ctrl 22 - qcom,msm8976-dsi-ctrl
23 - qcom,msm8996-dsi-ctrl 23 - qcom,msm8996-dsi-ctrl
24 - qcom,msm8998-dsi-ctrl 24 - qcom,msm8998-dsi-ctrl
25 - qcom,qcm2290-dsi-ctrl 25 - qcom,qcm2290-dsi-ctrl
26 - qcom,sc7180-dsi-ctrl 26 - qcom,sc7180-dsi-ctrl
27 - qcom,sc7280-dsi-ctrl 27 - qcom,sc7280-dsi-ctrl
28 - qcom,sdm660-dsi-ctrl 28 - qcom,sdm660-dsi-ctrl
29 - qcom,sdm670-dsi-ctrl 29 - qcom,sdm670-dsi-ctrl
30 - qcom,sdm845-dsi-ctrl 30 - qcom,sdm845-dsi-ctrl
31 - qcom,sm6115-dsi-ctrl 31 - qcom,sm6115-dsi-ctrl
32 - qcom,sm6125-dsi-ctrl 32 - qcom,sm6125-dsi-ctrl
33 - qcom,sm6350-dsi-ctrl 33 - qcom,sm6350-dsi-ctrl
34 - qcom,sm6375-dsi-ctrl 34 - qcom,sm6375-dsi-ctrl
35 - qcom,sm7150-dsi-ctrl <<
36 - qcom,sm8150-dsi-ctrl 35 - qcom,sm8150-dsi-ctrl
37 - qcom,sm8250-dsi-ctrl 36 - qcom,sm8250-dsi-ctrl
38 - qcom,sm8350-dsi-ctrl 37 - qcom,sm8350-dsi-ctrl
39 - qcom,sm8450-dsi-ctrl 38 - qcom,sm8450-dsi-ctrl
40 - qcom,sm8550-dsi-ctrl 39 - qcom,sm8550-dsi-ctrl
41 - qcom,sm8650-dsi-ctrl 40 - qcom,sm8650-dsi-ctrl
42 - const: qcom,mdss-dsi-ctrl 41 - const: qcom,mdss-dsi-ctrl
43 - enum: 42 - enum:
44 - qcom,dsi-ctrl-6g-qcm2290 43 - qcom,dsi-ctrl-6g-qcm2290
45 - qcom,mdss-dsi-ctrl # This should a 44 - qcom,mdss-dsi-ctrl # This should always come with an SoC-specific compatible
46 deprecated: true 45 deprecated: true
47 46
48 reg: 47 reg:
49 maxItems: 1 48 maxItems: 1
50 49
51 reg-names: 50 reg-names:
52 const: dsi_ctrl 51 const: dsi_ctrl
53 52
54 interrupts: 53 interrupts:
55 maxItems: 1 54 maxItems: 1
56 55
57 clocks: 56 clocks:
58 description: | 57 description: |
59 Several clocks are used, depending on th 58 Several clocks are used, depending on the variant. Typical ones are::
60 - bus:: Display AHB clock. 59 - bus:: Display AHB clock.
61 - byte:: Display byte clock. 60 - byte:: Display byte clock.
62 - byte_intf:: Display byte interface cl 61 - byte_intf:: Display byte interface clock.
63 - core:: Display core clock. 62 - core:: Display core clock.
64 - core_mss:: Core MultiMedia SubSystem 63 - core_mss:: Core MultiMedia SubSystem clock.
65 - iface:: Display AXI clock. 64 - iface:: Display AXI clock.
66 - mdp_core:: MDP Core clock. 65 - mdp_core:: MDP Core clock.
67 - mnoc:: MNOC clock 66 - mnoc:: MNOC clock
68 - pixel:: Display pixel clock. 67 - pixel:: Display pixel clock.
69 minItems: 3 68 minItems: 3
70 maxItems: 9 69 maxItems: 9
71 70
72 clock-names: 71 clock-names:
73 minItems: 3 72 minItems: 3
74 maxItems: 9 73 maxItems: 9
75 74
76 phys: 75 phys:
77 maxItems: 1 76 maxItems: 1
78 77
79 phy-names: 78 phy-names:
80 deprecated: true 79 deprecated: true
81 const: dsi 80 const: dsi
82 81
83 syscon-sfpb: 82 syscon-sfpb:
84 description: A phandle to mmss_sfpb syscon 83 description: A phandle to mmss_sfpb syscon node (only for DSIv2).
85 $ref: /schemas/types.yaml#/definitions/pha 84 $ref: /schemas/types.yaml#/definitions/phandle
86 85
87 qcom,dual-dsi-mode: 86 qcom,dual-dsi-mode:
88 type: boolean 87 type: boolean
89 description: | 88 description: |
90 Indicates if the DSI controller is drivi 89 Indicates if the DSI controller is driving a panel which needs
91 2 DSI links. 90 2 DSI links.
92 91
93 qcom,master-dsi: 92 qcom,master-dsi:
94 type: boolean 93 type: boolean
95 description: | 94 description: |
96 Indicates if the DSI controller is the m 95 Indicates if the DSI controller is the master DSI controller when
97 qcom,dual-dsi-mode enabled. 96 qcom,dual-dsi-mode enabled.
98 97
99 qcom,sync-dual-dsi: 98 qcom,sync-dual-dsi:
100 type: boolean 99 type: boolean
101 description: | 100 description: |
102 Indicates if the DSI controller needs to 101 Indicates if the DSI controller needs to sync the other DSI controller
103 with MIPI DCS commands when qcom,dual-ds 102 with MIPI DCS commands when qcom,dual-dsi-mode enabled.
104 103
105 assigned-clocks: 104 assigned-clocks:
106 minItems: 2 105 minItems: 2
107 maxItems: 4 106 maxItems: 4
108 description: | 107 description: |
109 Parents of "byte" and "pixel" for the gi 108 Parents of "byte" and "pixel" for the given platform.
110 For DSIv2 platforms this should contain 109 For DSIv2 platforms this should contain "byte", "esc", "src" and
111 "pixel_src" clocks. 110 "pixel_src" clocks.
112 111
113 assigned-clock-parents: 112 assigned-clock-parents:
114 minItems: 2 113 minItems: 2
115 maxItems: 4 114 maxItems: 4
116 description: | 115 description: |
117 The Byte clock and Pixel clock PLL outpu 116 The Byte clock and Pixel clock PLL outputs provided by a DSI PHY block.
118 117
119 power-domains: 118 power-domains:
120 maxItems: 1 119 maxItems: 1
121 120
122 operating-points-v2: true 121 operating-points-v2: true
123 122
124 opp-table: 123 opp-table:
125 type: object 124 type: object
126 125
127 ports: 126 ports:
128 $ref: /schemas/graph.yaml#/properties/port 127 $ref: /schemas/graph.yaml#/properties/ports
129 description: | 128 description: |
130 Contains DSI controller input and output 129 Contains DSI controller input and output ports as children, each
131 containing one endpoint subnode. 130 containing one endpoint subnode.
132 131
133 properties: 132 properties:
134 port@0: 133 port@0:
135 $ref: /schemas/graph.yaml#/$defs/port- 134 $ref: /schemas/graph.yaml#/$defs/port-base
136 unevaluatedProperties: false 135 unevaluatedProperties: false
137 description: | 136 description: |
138 Input endpoints of the controller. 137 Input endpoints of the controller.
139 properties: 138 properties:
140 endpoint: 139 endpoint:
141 $ref: /schemas/media/video-interfa 140 $ref: /schemas/media/video-interfaces.yaml#
142 unevaluatedProperties: false 141 unevaluatedProperties: false
143 properties: 142 properties:
144 data-lanes: 143 data-lanes:
145 maxItems: 4 144 maxItems: 4
146 minItems: 1 145 minItems: 1
147 items: 146 items:
148 enum: [ 0, 1, 2, 3 ] 147 enum: [ 0, 1, 2, 3 ]
149 148
150 port@1: 149 port@1:
151 $ref: /schemas/graph.yaml#/$defs/port- 150 $ref: /schemas/graph.yaml#/$defs/port-base
152 unevaluatedProperties: false 151 unevaluatedProperties: false
153 description: | 152 description: |
154 Output endpoints of the controller. 153 Output endpoints of the controller.
155 properties: 154 properties:
156 endpoint: 155 endpoint:
157 $ref: /schemas/media/video-interfa 156 $ref: /schemas/media/video-interfaces.yaml#
158 unevaluatedProperties: false 157 unevaluatedProperties: false
159 properties: 158 properties:
160 data-lanes: 159 data-lanes:
161 maxItems: 4 160 maxItems: 4
162 minItems: 1 161 minItems: 1
163 items: 162 items:
164 enum: [ 0, 1, 2, 3 ] 163 enum: [ 0, 1, 2, 3 ]
165 164
166 qcom,te-source: <<
167 $ref: /schemas/types.yaml#/def <<
168 description: <<
169 Specifies the source of vsyn <<
170 tearing elimination. <<
171 default: mdp_vsync_p <<
172 enum: <<
173 - mdp_vsync_p <<
174 - mdp_vsync_s <<
175 - mdp_vsync_e <<
176 - timer0 <<
177 - timer1 <<
178 - timer2 <<
179 - timer3 <<
180 - timer4 <<
181 <<
182 required: 165 required:
183 - port@0 166 - port@0
184 - port@1 167 - port@1
185 168
186 avdd-supply: 169 avdd-supply:
187 description: 170 description:
188 Phandle to vdd regulator device node 171 Phandle to vdd regulator device node
189 172
190 refgen-supply: 173 refgen-supply:
191 description: 174 description:
192 Phandle to REFGEN regulator device node 175 Phandle to REFGEN regulator device node
193 176
194 vcca-supply: 177 vcca-supply:
195 description: 178 description:
196 Phandle to vdd regulator device node 179 Phandle to vdd regulator device node
197 180
198 vdd-supply: 181 vdd-supply:
199 description: 182 description:
200 VDD regulator 183 VDD regulator
201 184
202 vddio-supply: 185 vddio-supply:
203 description: 186 description:
204 VDD-IO regulator 187 VDD-IO regulator
205 188
206 vdda-supply: 189 vdda-supply:
207 description: 190 description:
208 VDDA regulator 191 VDDA regulator
209 192
210 required: 193 required:
211 - compatible 194 - compatible
212 - reg 195 - reg
213 - reg-names 196 - reg-names
214 - interrupts 197 - interrupts
215 - clocks 198 - clocks
216 - clock-names 199 - clock-names
217 - phys 200 - phys
218 - assigned-clocks 201 - assigned-clocks
219 - assigned-clock-parents 202 - assigned-clock-parents
220 - ports 203 - ports
221 204
222 allOf: 205 allOf:
223 - $ref: ../dsi-controller.yaml# 206 - $ref: ../dsi-controller.yaml#
224 - if: 207 - if:
225 properties: 208 properties:
226 compatible: 209 compatible:
227 contains: 210 contains:
228 enum: 211 enum:
229 - qcom,apq8064-dsi-ctrl 212 - qcom,apq8064-dsi-ctrl
230 then: 213 then:
231 properties: 214 properties:
232 clocks: 215 clocks:
233 maxItems: 7 216 maxItems: 7
234 clock-names: 217 clock-names:
235 items: 218 items:
236 - const: iface 219 - const: iface
237 - const: bus 220 - const: bus
238 - const: core_mmss 221 - const: core_mmss
239 - const: src 222 - const: src
240 - const: byte 223 - const: byte
241 - const: pixel 224 - const: pixel
242 - const: core 225 - const: core
243 226
244 - if: 227 - if:
245 properties: 228 properties:
246 compatible: 229 compatible:
247 contains: 230 contains:
248 enum: 231 enum:
249 - qcom,msm8916-dsi-ctrl 232 - qcom,msm8916-dsi-ctrl
250 then: 233 then:
251 properties: 234 properties:
252 clocks: 235 clocks:
253 maxItems: 6 236 maxItems: 6
254 clock-names: 237 clock-names:
255 items: 238 items:
256 - const: mdp_core 239 - const: mdp_core
257 - const: iface 240 - const: iface
258 - const: bus 241 - const: bus
259 - const: byte 242 - const: byte
260 - const: pixel 243 - const: pixel
261 - const: core 244 - const: core
262 245
263 - if: 246 - if:
264 properties: 247 properties:
265 compatible: 248 compatible:
266 contains: 249 contains:
267 enum: 250 enum:
268 - qcom,msm8953-dsi-ctrl 251 - qcom,msm8953-dsi-ctrl
269 - qcom,msm8976-dsi-ctrl 252 - qcom,msm8976-dsi-ctrl
270 then: 253 then:
271 properties: 254 properties:
272 clocks: 255 clocks:
273 maxItems: 6 256 maxItems: 6
274 clock-names: 257 clock-names:
275 items: 258 items:
276 - const: mdp_core 259 - const: mdp_core
277 - const: iface 260 - const: iface
278 - const: bus 261 - const: bus
279 - const: byte 262 - const: byte
280 - const: pixel 263 - const: pixel
281 - const: core 264 - const: core
282 265
283 - if: 266 - if:
284 properties: 267 properties:
285 compatible: 268 compatible:
286 contains: 269 contains:
287 enum: 270 enum:
288 - qcom,msm8226-dsi-ctrl 271 - qcom,msm8226-dsi-ctrl
289 - qcom,msm8974-dsi-ctrl 272 - qcom,msm8974-dsi-ctrl
290 then: 273 then:
291 properties: 274 properties:
292 clocks: 275 clocks:
293 maxItems: 7 276 maxItems: 7
294 clock-names: 277 clock-names:
295 items: 278 items:
296 - const: mdp_core 279 - const: mdp_core
297 - const: iface 280 - const: iface
298 - const: bus 281 - const: bus
299 - const: byte 282 - const: byte
300 - const: pixel 283 - const: pixel
301 - const: core 284 - const: core
302 - const: core_mmss 285 - const: core_mmss
303 286
304 - if: 287 - if:
305 properties: 288 properties:
306 compatible: 289 compatible:
307 contains: 290 contains:
308 enum: 291 enum:
309 - qcom,msm8996-dsi-ctrl 292 - qcom,msm8996-dsi-ctrl
310 then: 293 then:
311 properties: 294 properties:
312 clocks: 295 clocks:
313 maxItems: 7 296 maxItems: 7
314 clock-names: 297 clock-names:
315 items: 298 items:
316 - const: mdp_core 299 - const: mdp_core
317 - const: byte 300 - const: byte
318 - const: iface 301 - const: iface
319 - const: bus 302 - const: bus
320 - const: core_mmss 303 - const: core_mmss
321 - const: pixel 304 - const: pixel
322 - const: core 305 - const: core
323 306
324 - if: 307 - if:
325 properties: 308 properties:
326 compatible: 309 compatible:
327 contains: 310 contains:
328 enum: 311 enum:
329 - qcom,msm8998-dsi-ctrl 312 - qcom,msm8998-dsi-ctrl
330 - qcom,sm6125-dsi-ctrl 313 - qcom,sm6125-dsi-ctrl
331 - qcom,sm6350-dsi-ctrl 314 - qcom,sm6350-dsi-ctrl
332 then: 315 then:
333 properties: 316 properties:
334 clocks: 317 clocks:
335 maxItems: 6 318 maxItems: 6
336 clock-names: 319 clock-names:
337 items: 320 items:
338 - const: byte 321 - const: byte
339 - const: byte_intf 322 - const: byte_intf
340 - const: pixel 323 - const: pixel
341 - const: core 324 - const: core
342 - const: iface 325 - const: iface
343 - const: bus 326 - const: bus
344 327
345 - if: 328 - if:
346 properties: 329 properties:
347 compatible: 330 compatible:
348 contains: 331 contains:
349 enum: 332 enum:
350 - qcom,sc7180-dsi-ctrl 333 - qcom,sc7180-dsi-ctrl
351 - qcom,sc7280-dsi-ctrl 334 - qcom,sc7280-dsi-ctrl
352 - qcom,sm7150-dsi-ctrl <<
353 - qcom,sm8150-dsi-ctrl 335 - qcom,sm8150-dsi-ctrl
354 - qcom,sm8250-dsi-ctrl 336 - qcom,sm8250-dsi-ctrl
355 - qcom,sm8350-dsi-ctrl 337 - qcom,sm8350-dsi-ctrl
356 - qcom,sm8450-dsi-ctrl 338 - qcom,sm8450-dsi-ctrl
357 - qcom,sm8550-dsi-ctrl 339 - qcom,sm8550-dsi-ctrl
358 - qcom,sm8650-dsi-ctrl 340 - qcom,sm8650-dsi-ctrl
359 then: 341 then:
360 properties: 342 properties:
361 clocks: 343 clocks:
362 maxItems: 6 344 maxItems: 6
363 clock-names: 345 clock-names:
364 items: 346 items:
365 - const: byte 347 - const: byte
366 - const: byte_intf 348 - const: byte_intf
367 - const: pixel 349 - const: pixel
368 - const: core 350 - const: core
369 - const: iface 351 - const: iface
370 - const: bus 352 - const: bus
371 353
372 - if: 354 - if:
373 properties: 355 properties:
374 compatible: 356 compatible:
375 contains: 357 contains:
376 enum: 358 enum:
377 - qcom,sdm660-dsi-ctrl 359 - qcom,sdm660-dsi-ctrl
378 then: 360 then:
379 properties: 361 properties:
380 clocks: 362 clocks:
381 maxItems: 9 363 maxItems: 9
382 clock-names: 364 clock-names:
383 items: 365 items:
384 - const: mdp_core 366 - const: mdp_core
385 - const: byte 367 - const: byte
386 - const: byte_intf 368 - const: byte_intf
387 - const: mnoc 369 - const: mnoc
388 - const: iface 370 - const: iface
389 - const: bus 371 - const: bus
390 - const: core_mmss 372 - const: core_mmss
391 - const: pixel 373 - const: pixel
392 - const: core 374 - const: core
393 375
394 - if: 376 - if:
395 properties: 377 properties:
396 compatible: 378 compatible:
397 contains: 379 contains:
398 enum: 380 enum:
399 - qcom,sdm845-dsi-ctrl 381 - qcom,sdm845-dsi-ctrl
400 - qcom,sm6115-dsi-ctrl 382 - qcom,sm6115-dsi-ctrl
401 - qcom,sm6375-dsi-ctrl 383 - qcom,sm6375-dsi-ctrl
402 then: 384 then:
403 properties: 385 properties:
404 clocks: 386 clocks:
405 maxItems: 6 387 maxItems: 6
406 clock-names: 388 clock-names:
407 items: 389 items:
408 - const: byte 390 - const: byte
409 - const: byte_intf 391 - const: byte_intf
410 - const: pixel 392 - const: pixel
411 - const: core 393 - const: core
412 - const: iface 394 - const: iface
413 - const: bus 395 - const: bus
414 396
415 unevaluatedProperties: false 397 unevaluatedProperties: false
416 398
417 examples: 399 examples:
418 - | 400 - |
419 #include <dt-bindings/interrupt-controlle 401 #include <dt-bindings/interrupt-controller/arm-gic.h>
420 #include <dt-bindings/clock/qcom,dispcc-s 402 #include <dt-bindings/clock/qcom,dispcc-sdm845.h>
421 #include <dt-bindings/clock/qcom,gcc-sdm8 403 #include <dt-bindings/clock/qcom,gcc-sdm845.h>
422 #include <dt-bindings/power/qcom-rpmpd.h> 404 #include <dt-bindings/power/qcom-rpmpd.h>
423 405
424 dsi@ae94000 { 406 dsi@ae94000 {
425 compatible = "qcom,sc7180-dsi-ctrl" 407 compatible = "qcom,sc7180-dsi-ctrl", "qcom,mdss-dsi-ctrl";
426 reg = <0x0ae94000 0x400>; 408 reg = <0x0ae94000 0x400>;
427 reg-names = "dsi_ctrl"; 409 reg-names = "dsi_ctrl";
428 410
429 #address-cells = <1>; 411 #address-cells = <1>;
430 #size-cells = <0>; 412 #size-cells = <0>;
431 413
432 interrupt-parent = <&mdss>; 414 interrupt-parent = <&mdss>;
433 interrupts = <4>; 415 interrupts = <4>;
434 416
435 clocks = <&dispcc DISP_CC_MDSS_BYTE 417 clocks = <&dispcc DISP_CC_MDSS_BYTE0_CLK>,
436 <&dispcc DISP_CC_MDSS_BYTE 418 <&dispcc DISP_CC_MDSS_BYTE0_INTF_CLK>,
437 <&dispcc DISP_CC_MDSS_PCLK 419 <&dispcc DISP_CC_MDSS_PCLK0_CLK>,
438 <&dispcc DISP_CC_MDSS_ESC0 420 <&dispcc DISP_CC_MDSS_ESC0_CLK>,
439 <&dispcc DISP_CC_MDSS_AHB_ 421 <&dispcc DISP_CC_MDSS_AHB_CLK>,
440 <&dispcc DISP_CC_MDSS_AXI_ 422 <&dispcc DISP_CC_MDSS_AXI_CLK>;
441 clock-names = "byte", 423 clock-names = "byte",
442 "byte_intf", 424 "byte_intf",
443 "pixel", 425 "pixel",
444 "core", 426 "core",
445 "iface", 427 "iface",
446 "bus"; 428 "bus";
447 429
448 phys = <&dsi0_phy>; 430 phys = <&dsi0_phy>;
449 phy-names = "dsi"; 431 phy-names = "dsi";
450 432
451 assigned-clocks = <&dispcc DISP_CC_ 433 assigned-clocks = <&dispcc DISP_CC_MDSS_BYTE0_CLK_SRC>, <&dispcc DISP_CC_MDSS_PCLK0_CLK_SRC>;
452 assigned-clock-parents = <&dsi_phy 434 assigned-clock-parents = <&dsi_phy 0>, <&dsi_phy 1>;
453 435
454 power-domains = <&rpmhpd SC7180_CX> 436 power-domains = <&rpmhpd SC7180_CX>;
455 operating-points-v2 = <&dsi_opp_tab 437 operating-points-v2 = <&dsi_opp_table>;
456 438
457 ports { 439 ports {
458 #address-cells = <1>; 440 #address-cells = <1>;
459 #size-cells = <0>; 441 #size-cells = <0>;
460 442
461 port@0 { 443 port@0 {
462 reg = <0>; 444 reg = <0>;
463 dsi0_in: endpoint { 445 dsi0_in: endpoint {
464 remote-endp 446 remote-endpoint = <&dpu_intf1_out>;
465 }; 447 };
466 }; 448 };
467 449
468 port@1 { 450 port@1 {
469 reg = <1>; 451 reg = <1>;
470 dsi0_out: endpoint { 452 dsi0_out: endpoint {
471 remote-endp 453 remote-endpoint = <&sn65dsi86_in>;
472 data-lanes 454 data-lanes = <0 1 2 3>;
473 qcom,te-sou <<
474 }; 455 };
475 }; 456 };
476 }; 457 };
477 }; 458 };
478 ... 459 ...
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