1 # SPDX-License-Identifier: GPL-2.0-only OR BSD !! 1 # SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause
2 %YAML 1.2 2 %YAML 1.2
3 --- 3 ---
4 $id: http://devicetree.org/schemas/display/msm 4 $id: http://devicetree.org/schemas/display/msm/dsi-controller-main.yaml#
5 $schema: http://devicetree.org/meta-schemas/co 5 $schema: http://devicetree.org/meta-schemas/core.yaml#
6 6
7 title: Qualcomm Display DSI controller 7 title: Qualcomm Display DSI controller
8 8
9 maintainers: 9 maintainers:
10 - Krishna Manikandan <quic_mkrishn@quicinc.co 10 - Krishna Manikandan <quic_mkrishn@quicinc.com>
11 11
12 properties: 12 properties:
13 compatible: 13 compatible:
14 oneOf: 14 oneOf:
15 - items: 15 - items:
16 - enum: 16 - enum:
17 - qcom,apq8064-dsi-ctrl 17 - qcom,apq8064-dsi-ctrl
18 - qcom,msm8226-dsi-ctrl <<
19 - qcom,msm8916-dsi-ctrl 18 - qcom,msm8916-dsi-ctrl
20 - qcom,msm8953-dsi-ctrl 19 - qcom,msm8953-dsi-ctrl
21 - qcom,msm8974-dsi-ctrl 20 - qcom,msm8974-dsi-ctrl
22 - qcom,msm8976-dsi-ctrl <<
23 - qcom,msm8996-dsi-ctrl 21 - qcom,msm8996-dsi-ctrl
24 - qcom,msm8998-dsi-ctrl 22 - qcom,msm8998-dsi-ctrl
25 - qcom,qcm2290-dsi-ctrl 23 - qcom,qcm2290-dsi-ctrl
26 - qcom,sc7180-dsi-ctrl 24 - qcom,sc7180-dsi-ctrl
27 - qcom,sc7280-dsi-ctrl 25 - qcom,sc7280-dsi-ctrl
28 - qcom,sdm660-dsi-ctrl 26 - qcom,sdm660-dsi-ctrl
29 - qcom,sdm670-dsi-ctrl <<
30 - qcom,sdm845-dsi-ctrl 27 - qcom,sdm845-dsi-ctrl
31 - qcom,sm6115-dsi-ctrl 28 - qcom,sm6115-dsi-ctrl
32 - qcom,sm6125-dsi-ctrl <<
33 - qcom,sm6350-dsi-ctrl <<
34 - qcom,sm6375-dsi-ctrl <<
35 - qcom,sm7150-dsi-ctrl <<
36 - qcom,sm8150-dsi-ctrl 29 - qcom,sm8150-dsi-ctrl
37 - qcom,sm8250-dsi-ctrl 30 - qcom,sm8250-dsi-ctrl
38 - qcom,sm8350-dsi-ctrl 31 - qcom,sm8350-dsi-ctrl
39 - qcom,sm8450-dsi-ctrl 32 - qcom,sm8450-dsi-ctrl
40 - qcom,sm8550-dsi-ctrl 33 - qcom,sm8550-dsi-ctrl
41 - qcom,sm8650-dsi-ctrl <<
42 - const: qcom,mdss-dsi-ctrl 34 - const: qcom,mdss-dsi-ctrl
43 - enum: 35 - enum:
44 - qcom,dsi-ctrl-6g-qcm2290 36 - qcom,dsi-ctrl-6g-qcm2290
45 - qcom,mdss-dsi-ctrl # This should a 37 - qcom,mdss-dsi-ctrl # This should always come with an SoC-specific compatible
46 deprecated: true 38 deprecated: true
47 39
48 reg: 40 reg:
49 maxItems: 1 41 maxItems: 1
50 42
51 reg-names: 43 reg-names:
52 const: dsi_ctrl 44 const: dsi_ctrl
53 45
54 interrupts: 46 interrupts:
55 maxItems: 1 47 maxItems: 1
56 48
57 clocks: 49 clocks:
58 description: | 50 description: |
59 Several clocks are used, depending on th 51 Several clocks are used, depending on the variant. Typical ones are::
60 - bus:: Display AHB clock. 52 - bus:: Display AHB clock.
61 - byte:: Display byte clock. 53 - byte:: Display byte clock.
62 - byte_intf:: Display byte interface cl 54 - byte_intf:: Display byte interface clock.
63 - core:: Display core clock. 55 - core:: Display core clock.
64 - core_mss:: Core MultiMedia SubSystem 56 - core_mss:: Core MultiMedia SubSystem clock.
65 - iface:: Display AXI clock. 57 - iface:: Display AXI clock.
66 - mdp_core:: MDP Core clock. 58 - mdp_core:: MDP Core clock.
67 - mnoc:: MNOC clock 59 - mnoc:: MNOC clock
68 - pixel:: Display pixel clock. 60 - pixel:: Display pixel clock.
69 minItems: 3 61 minItems: 3
70 maxItems: 9 62 maxItems: 9
71 63
72 clock-names: 64 clock-names:
73 minItems: 3 65 minItems: 3
74 maxItems: 9 66 maxItems: 9
75 67
76 phys: 68 phys:
77 maxItems: 1 69 maxItems: 1
78 70
79 phy-names: 71 phy-names:
80 deprecated: true 72 deprecated: true
81 const: dsi 73 const: dsi
82 74
83 syscon-sfpb: 75 syscon-sfpb:
84 description: A phandle to mmss_sfpb syscon 76 description: A phandle to mmss_sfpb syscon node (only for DSIv2).
85 $ref: /schemas/types.yaml#/definitions/pha 77 $ref: /schemas/types.yaml#/definitions/phandle
86 78
87 qcom,dual-dsi-mode: 79 qcom,dual-dsi-mode:
88 type: boolean 80 type: boolean
89 description: | 81 description: |
90 Indicates if the DSI controller is drivi 82 Indicates if the DSI controller is driving a panel which needs
91 2 DSI links. 83 2 DSI links.
92 84
93 qcom,master-dsi: 85 qcom,master-dsi:
94 type: boolean 86 type: boolean
95 description: | 87 description: |
96 Indicates if the DSI controller is the m 88 Indicates if the DSI controller is the master DSI controller when
97 qcom,dual-dsi-mode enabled. 89 qcom,dual-dsi-mode enabled.
98 90
99 qcom,sync-dual-dsi: 91 qcom,sync-dual-dsi:
100 type: boolean 92 type: boolean
101 description: | 93 description: |
102 Indicates if the DSI controller needs to 94 Indicates if the DSI controller needs to sync the other DSI controller
103 with MIPI DCS commands when qcom,dual-ds 95 with MIPI DCS commands when qcom,dual-dsi-mode enabled.
104 96
105 assigned-clocks: 97 assigned-clocks:
106 minItems: 2 98 minItems: 2
107 maxItems: 4 99 maxItems: 4
108 description: | 100 description: |
109 Parents of "byte" and "pixel" for the gi 101 Parents of "byte" and "pixel" for the given platform.
110 For DSIv2 platforms this should contain 102 For DSIv2 platforms this should contain "byte", "esc", "src" and
111 "pixel_src" clocks. 103 "pixel_src" clocks.
112 104
113 assigned-clock-parents: 105 assigned-clock-parents:
114 minItems: 2 106 minItems: 2
115 maxItems: 4 107 maxItems: 4
116 description: | 108 description: |
117 The Byte clock and Pixel clock PLL outpu 109 The Byte clock and Pixel clock PLL outputs provided by a DSI PHY block.
118 110
119 power-domains: 111 power-domains:
120 maxItems: 1 112 maxItems: 1
121 113
122 operating-points-v2: true 114 operating-points-v2: true
123 115
124 opp-table: 116 opp-table:
125 type: object 117 type: object
126 118
127 ports: 119 ports:
128 $ref: /schemas/graph.yaml#/properties/port 120 $ref: /schemas/graph.yaml#/properties/ports
129 description: | 121 description: |
130 Contains DSI controller input and output 122 Contains DSI controller input and output ports as children, each
131 containing one endpoint subnode. 123 containing one endpoint subnode.
132 124
133 properties: 125 properties:
134 port@0: 126 port@0:
135 $ref: /schemas/graph.yaml#/$defs/port- 127 $ref: /schemas/graph.yaml#/$defs/port-base
136 unevaluatedProperties: false 128 unevaluatedProperties: false
137 description: | 129 description: |
138 Input endpoints of the controller. 130 Input endpoints of the controller.
139 properties: 131 properties:
140 endpoint: 132 endpoint:
141 $ref: /schemas/media/video-interfa 133 $ref: /schemas/media/video-interfaces.yaml#
142 unevaluatedProperties: false 134 unevaluatedProperties: false
143 properties: 135 properties:
144 data-lanes: 136 data-lanes:
145 maxItems: 4 137 maxItems: 4
146 minItems: 1 138 minItems: 1
147 items: 139 items:
148 enum: [ 0, 1, 2, 3 ] 140 enum: [ 0, 1, 2, 3 ]
149 141
150 port@1: 142 port@1:
151 $ref: /schemas/graph.yaml#/$defs/port- 143 $ref: /schemas/graph.yaml#/$defs/port-base
152 unevaluatedProperties: false 144 unevaluatedProperties: false
153 description: | 145 description: |
154 Output endpoints of the controller. 146 Output endpoints of the controller.
155 properties: 147 properties:
156 endpoint: 148 endpoint:
157 $ref: /schemas/media/video-interfa 149 $ref: /schemas/media/video-interfaces.yaml#
158 unevaluatedProperties: false 150 unevaluatedProperties: false
159 properties: 151 properties:
160 data-lanes: 152 data-lanes:
161 maxItems: 4 153 maxItems: 4
162 minItems: 1 154 minItems: 1
163 items: 155 items:
164 enum: [ 0, 1, 2, 3 ] 156 enum: [ 0, 1, 2, 3 ]
165 157
166 qcom,te-source: <<
167 $ref: /schemas/types.yaml#/def <<
168 description: <<
169 Specifies the source of vsyn <<
170 tearing elimination. <<
171 default: mdp_vsync_p <<
172 enum: <<
173 - mdp_vsync_p <<
174 - mdp_vsync_s <<
175 - mdp_vsync_e <<
176 - timer0 <<
177 - timer1 <<
178 - timer2 <<
179 - timer3 <<
180 - timer4 <<
181 <<
182 required: 158 required:
183 - port@0 159 - port@0
184 - port@1 160 - port@1
185 161
186 avdd-supply: 162 avdd-supply:
187 description: 163 description:
188 Phandle to vdd regulator device node 164 Phandle to vdd regulator device node
189 165
190 refgen-supply: <<
191 description: <<
192 Phandle to REFGEN regulator device node <<
193 <<
194 vcca-supply: 166 vcca-supply:
195 description: 167 description:
196 Phandle to vdd regulator device node 168 Phandle to vdd regulator device node
197 169
198 vdd-supply: 170 vdd-supply:
199 description: 171 description:
200 VDD regulator 172 VDD regulator
201 173
202 vddio-supply: 174 vddio-supply:
203 description: 175 description:
204 VDD-IO regulator 176 VDD-IO regulator
205 177
206 vdda-supply: 178 vdda-supply:
207 description: 179 description:
208 VDDA regulator 180 VDDA regulator
209 181
210 required: 182 required:
211 - compatible 183 - compatible
212 - reg 184 - reg
213 - reg-names 185 - reg-names
214 - interrupts 186 - interrupts
215 - clocks 187 - clocks
216 - clock-names 188 - clock-names
217 - phys 189 - phys
218 - assigned-clocks 190 - assigned-clocks
219 - assigned-clock-parents 191 - assigned-clock-parents
220 - ports 192 - ports
221 193
222 allOf: 194 allOf:
223 - $ref: ../dsi-controller.yaml# 195 - $ref: ../dsi-controller.yaml#
224 - if: 196 - if:
225 properties: 197 properties:
226 compatible: 198 compatible:
227 contains: 199 contains:
228 enum: 200 enum:
229 - qcom,apq8064-dsi-ctrl 201 - qcom,apq8064-dsi-ctrl
230 then: 202 then:
231 properties: 203 properties:
232 clocks: 204 clocks:
233 maxItems: 7 205 maxItems: 7
234 clock-names: 206 clock-names:
235 items: 207 items:
236 - const: iface 208 - const: iface
237 - const: bus 209 - const: bus
238 - const: core_mmss 210 - const: core_mmss
239 - const: src 211 - const: src
240 - const: byte 212 - const: byte
241 - const: pixel 213 - const: pixel
242 - const: core 214 - const: core
243 215
244 - if: 216 - if:
245 properties: 217 properties:
246 compatible: 218 compatible:
247 contains: 219 contains:
248 enum: 220 enum:
249 - qcom,msm8916-dsi-ctrl 221 - qcom,msm8916-dsi-ctrl
250 then: 222 then:
251 properties: 223 properties:
252 clocks: 224 clocks:
253 maxItems: 6 225 maxItems: 6
254 clock-names: 226 clock-names:
255 items: 227 items:
256 - const: mdp_core 228 - const: mdp_core
257 - const: iface 229 - const: iface
258 - const: bus 230 - const: bus
259 - const: byte 231 - const: byte
260 - const: pixel 232 - const: pixel
261 - const: core 233 - const: core
262 234
263 - if: 235 - if:
264 properties: 236 properties:
265 compatible: 237 compatible:
266 contains: 238 contains:
267 enum: 239 enum:
268 - qcom,msm8953-dsi-ctrl 240 - qcom,msm8953-dsi-ctrl
269 - qcom,msm8976-dsi-ctrl <<
270 then: 241 then:
271 properties: 242 properties:
272 clocks: 243 clocks:
273 maxItems: 6 244 maxItems: 6
274 clock-names: 245 clock-names:
275 items: 246 items:
276 - const: mdp_core 247 - const: mdp_core
277 - const: iface 248 - const: iface
278 - const: bus 249 - const: bus
279 - const: byte 250 - const: byte
280 - const: pixel 251 - const: pixel
281 - const: core 252 - const: core
282 253
283 - if: 254 - if:
284 properties: 255 properties:
285 compatible: 256 compatible:
286 contains: 257 contains:
287 enum: 258 enum:
288 - qcom,msm8226-dsi-ctrl <<
289 - qcom,msm8974-dsi-ctrl 259 - qcom,msm8974-dsi-ctrl
290 then: 260 then:
291 properties: 261 properties:
292 clocks: 262 clocks:
293 maxItems: 7 263 maxItems: 7
294 clock-names: 264 clock-names:
295 items: 265 items:
296 - const: mdp_core 266 - const: mdp_core
297 - const: iface 267 - const: iface
298 - const: bus 268 - const: bus
299 - const: byte 269 - const: byte
300 - const: pixel 270 - const: pixel
301 - const: core 271 - const: core
302 - const: core_mmss 272 - const: core_mmss
303 273
304 - if: 274 - if:
305 properties: 275 properties:
306 compatible: 276 compatible:
307 contains: 277 contains:
308 enum: 278 enum:
309 - qcom,msm8996-dsi-ctrl 279 - qcom,msm8996-dsi-ctrl
310 then: 280 then:
311 properties: 281 properties:
312 clocks: 282 clocks:
313 maxItems: 7 283 maxItems: 7
314 clock-names: 284 clock-names:
315 items: 285 items:
316 - const: mdp_core 286 - const: mdp_core
317 - const: byte 287 - const: byte
318 - const: iface 288 - const: iface
319 - const: bus 289 - const: bus
320 - const: core_mmss 290 - const: core_mmss
321 - const: pixel 291 - const: pixel
322 - const: core 292 - const: core
323 293
324 - if: 294 - if:
325 properties: 295 properties:
326 compatible: 296 compatible:
327 contains: 297 contains:
328 enum: 298 enum:
329 - qcom,msm8998-dsi-ctrl 299 - qcom,msm8998-dsi-ctrl
330 - qcom,sm6125-dsi-ctrl <<
331 - qcom,sm6350-dsi-ctrl <<
332 then: 300 then:
333 properties: 301 properties:
334 clocks: 302 clocks:
335 maxItems: 6 303 maxItems: 6
336 clock-names: 304 clock-names:
337 items: 305 items:
338 - const: byte 306 - const: byte
339 - const: byte_intf 307 - const: byte_intf
340 - const: pixel 308 - const: pixel
341 - const: core 309 - const: core
342 - const: iface 310 - const: iface
343 - const: bus 311 - const: bus
344 312
345 - if: 313 - if:
346 properties: 314 properties:
347 compatible: 315 compatible:
348 contains: 316 contains:
349 enum: 317 enum:
350 - qcom,sc7180-dsi-ctrl 318 - qcom,sc7180-dsi-ctrl
351 - qcom,sc7280-dsi-ctrl 319 - qcom,sc7280-dsi-ctrl
352 - qcom,sm7150-dsi-ctrl <<
353 - qcom,sm8150-dsi-ctrl 320 - qcom,sm8150-dsi-ctrl
354 - qcom,sm8250-dsi-ctrl 321 - qcom,sm8250-dsi-ctrl
355 - qcom,sm8350-dsi-ctrl 322 - qcom,sm8350-dsi-ctrl
356 - qcom,sm8450-dsi-ctrl 323 - qcom,sm8450-dsi-ctrl
357 - qcom,sm8550-dsi-ctrl 324 - qcom,sm8550-dsi-ctrl
358 - qcom,sm8650-dsi-ctrl <<
359 then: 325 then:
360 properties: 326 properties:
361 clocks: 327 clocks:
362 maxItems: 6 328 maxItems: 6
363 clock-names: 329 clock-names:
364 items: 330 items:
365 - const: byte 331 - const: byte
366 - const: byte_intf 332 - const: byte_intf
367 - const: pixel 333 - const: pixel
368 - const: core 334 - const: core
369 - const: iface 335 - const: iface
370 - const: bus 336 - const: bus
371 337
372 - if: 338 - if:
373 properties: 339 properties:
374 compatible: 340 compatible:
375 contains: 341 contains:
376 enum: 342 enum:
377 - qcom,sdm660-dsi-ctrl 343 - qcom,sdm660-dsi-ctrl
378 then: 344 then:
379 properties: 345 properties:
380 clocks: 346 clocks:
381 maxItems: 9 347 maxItems: 9
382 clock-names: 348 clock-names:
383 items: 349 items:
384 - const: mdp_core 350 - const: mdp_core
385 - const: byte 351 - const: byte
386 - const: byte_intf 352 - const: byte_intf
387 - const: mnoc 353 - const: mnoc
388 - const: iface 354 - const: iface
389 - const: bus 355 - const: bus
390 - const: core_mmss 356 - const: core_mmss
391 - const: pixel 357 - const: pixel
392 - const: core 358 - const: core
393 359
394 - if: 360 - if:
395 properties: 361 properties:
396 compatible: 362 compatible:
397 contains: 363 contains:
398 enum: 364 enum:
399 - qcom,sdm845-dsi-ctrl 365 - qcom,sdm845-dsi-ctrl
400 - qcom,sm6115-dsi-ctrl 366 - qcom,sm6115-dsi-ctrl
401 - qcom,sm6375-dsi-ctrl <<
402 then: 367 then:
403 properties: 368 properties:
404 clocks: 369 clocks:
405 maxItems: 6 370 maxItems: 6
406 clock-names: 371 clock-names:
407 items: 372 items:
408 - const: byte 373 - const: byte
409 - const: byte_intf 374 - const: byte_intf
410 - const: pixel 375 - const: pixel
411 - const: core 376 - const: core
412 - const: iface 377 - const: iface
413 - const: bus 378 - const: bus
414 379
415 unevaluatedProperties: false 380 unevaluatedProperties: false
416 381
417 examples: 382 examples:
418 - | 383 - |
419 #include <dt-bindings/interrupt-controlle 384 #include <dt-bindings/interrupt-controller/arm-gic.h>
420 #include <dt-bindings/clock/qcom,dispcc-s 385 #include <dt-bindings/clock/qcom,dispcc-sdm845.h>
421 #include <dt-bindings/clock/qcom,gcc-sdm8 386 #include <dt-bindings/clock/qcom,gcc-sdm845.h>
422 #include <dt-bindings/power/qcom-rpmpd.h> 387 #include <dt-bindings/power/qcom-rpmpd.h>
423 388
424 dsi@ae94000 { 389 dsi@ae94000 {
425 compatible = "qcom,sc7180-dsi-ctrl" 390 compatible = "qcom,sc7180-dsi-ctrl", "qcom,mdss-dsi-ctrl";
426 reg = <0x0ae94000 0x400>; 391 reg = <0x0ae94000 0x400>;
427 reg-names = "dsi_ctrl"; 392 reg-names = "dsi_ctrl";
428 393
429 #address-cells = <1>; 394 #address-cells = <1>;
430 #size-cells = <0>; 395 #size-cells = <0>;
431 396
432 interrupt-parent = <&mdss>; 397 interrupt-parent = <&mdss>;
433 interrupts = <4>; 398 interrupts = <4>;
434 399
435 clocks = <&dispcc DISP_CC_MDSS_BYTE 400 clocks = <&dispcc DISP_CC_MDSS_BYTE0_CLK>,
436 <&dispcc DISP_CC_MDSS_BYTE 401 <&dispcc DISP_CC_MDSS_BYTE0_INTF_CLK>,
437 <&dispcc DISP_CC_MDSS_PCLK 402 <&dispcc DISP_CC_MDSS_PCLK0_CLK>,
438 <&dispcc DISP_CC_MDSS_ESC0 403 <&dispcc DISP_CC_MDSS_ESC0_CLK>,
439 <&dispcc DISP_CC_MDSS_AHB_ 404 <&dispcc DISP_CC_MDSS_AHB_CLK>,
440 <&dispcc DISP_CC_MDSS_AXI_ 405 <&dispcc DISP_CC_MDSS_AXI_CLK>;
441 clock-names = "byte", 406 clock-names = "byte",
442 "byte_intf", 407 "byte_intf",
443 "pixel", 408 "pixel",
444 "core", 409 "core",
445 "iface", 410 "iface",
446 "bus"; 411 "bus";
447 412
448 phys = <&dsi0_phy>; 413 phys = <&dsi0_phy>;
449 phy-names = "dsi"; 414 phy-names = "dsi";
450 415
451 assigned-clocks = <&dispcc DISP_CC_ 416 assigned-clocks = <&dispcc DISP_CC_MDSS_BYTE0_CLK_SRC>, <&dispcc DISP_CC_MDSS_PCLK0_CLK_SRC>;
452 assigned-clock-parents = <&dsi_phy 417 assigned-clock-parents = <&dsi_phy 0>, <&dsi_phy 1>;
453 418
454 power-domains = <&rpmhpd SC7180_CX> 419 power-domains = <&rpmhpd SC7180_CX>;
455 operating-points-v2 = <&dsi_opp_tab 420 operating-points-v2 = <&dsi_opp_table>;
456 421
457 ports { 422 ports {
458 #address-cells = <1>; 423 #address-cells = <1>;
459 #size-cells = <0>; 424 #size-cells = <0>;
460 425
461 port@0 { 426 port@0 {
462 reg = <0>; 427 reg = <0>;
463 dsi0_in: endpoint { 428 dsi0_in: endpoint {
464 remote-endp 429 remote-endpoint = <&dpu_intf1_out>;
465 }; 430 };
466 }; 431 };
467 432
468 port@1 { 433 port@1 {
469 reg = <1>; 434 reg = <1>;
470 dsi0_out: endpoint { 435 dsi0_out: endpoint {
471 remote-endp 436 remote-endpoint = <&sn65dsi86_in>;
472 data-lanes 437 data-lanes = <0 1 2 3>;
473 qcom,te-sou <<
474 }; 438 };
475 }; 439 };
476 }; 440 };
477 }; 441 };
478 ... 442 ...
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