1 # SPDX-License-Identifier: GPL-2.0-only OR BSD !! 1 # SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause
2 %YAML 1.2 2 %YAML 1.2
3 --- 3 ---
4 $id: http://devicetree.org/schemas/display/msm 4 $id: http://devicetree.org/schemas/display/msm/dsi-controller-main.yaml#
5 $schema: http://devicetree.org/meta-schemas/co 5 $schema: http://devicetree.org/meta-schemas/core.yaml#
6 6
7 title: Qualcomm Display DSI controller 7 title: Qualcomm Display DSI controller
8 8
9 maintainers: 9 maintainers:
10 - Krishna Manikandan <quic_mkrishn@quicinc.co 10 - Krishna Manikandan <quic_mkrishn@quicinc.com>
11 11
12 properties: 12 properties:
13 compatible: 13 compatible:
14 oneOf: 14 oneOf:
15 - items: 15 - items:
16 - enum: 16 - enum:
17 - qcom,apq8064-dsi-ctrl 17 - qcom,apq8064-dsi-ctrl
18 - qcom,msm8226-dsi-ctrl 18 - qcom,msm8226-dsi-ctrl
19 - qcom,msm8916-dsi-ctrl 19 - qcom,msm8916-dsi-ctrl
20 - qcom,msm8953-dsi-ctrl 20 - qcom,msm8953-dsi-ctrl
21 - qcom,msm8974-dsi-ctrl 21 - qcom,msm8974-dsi-ctrl
22 - qcom,msm8976-dsi-ctrl <<
23 - qcom,msm8996-dsi-ctrl 22 - qcom,msm8996-dsi-ctrl
24 - qcom,msm8998-dsi-ctrl 23 - qcom,msm8998-dsi-ctrl
25 - qcom,qcm2290-dsi-ctrl 24 - qcom,qcm2290-dsi-ctrl
26 - qcom,sc7180-dsi-ctrl 25 - qcom,sc7180-dsi-ctrl
27 - qcom,sc7280-dsi-ctrl 26 - qcom,sc7280-dsi-ctrl
28 - qcom,sdm660-dsi-ctrl 27 - qcom,sdm660-dsi-ctrl
29 - qcom,sdm670-dsi-ctrl <<
30 - qcom,sdm845-dsi-ctrl 28 - qcom,sdm845-dsi-ctrl
31 - qcom,sm6115-dsi-ctrl 29 - qcom,sm6115-dsi-ctrl
32 - qcom,sm6125-dsi-ctrl <<
33 - qcom,sm6350-dsi-ctrl 30 - qcom,sm6350-dsi-ctrl
34 - qcom,sm6375-dsi-ctrl 31 - qcom,sm6375-dsi-ctrl
35 - qcom,sm7150-dsi-ctrl <<
36 - qcom,sm8150-dsi-ctrl 32 - qcom,sm8150-dsi-ctrl
37 - qcom,sm8250-dsi-ctrl 33 - qcom,sm8250-dsi-ctrl
38 - qcom,sm8350-dsi-ctrl 34 - qcom,sm8350-dsi-ctrl
39 - qcom,sm8450-dsi-ctrl 35 - qcom,sm8450-dsi-ctrl
40 - qcom,sm8550-dsi-ctrl 36 - qcom,sm8550-dsi-ctrl
41 - qcom,sm8650-dsi-ctrl <<
42 - const: qcom,mdss-dsi-ctrl 37 - const: qcom,mdss-dsi-ctrl
43 - enum: 38 - enum:
44 - qcom,dsi-ctrl-6g-qcm2290 39 - qcom,dsi-ctrl-6g-qcm2290
45 - qcom,mdss-dsi-ctrl # This should a 40 - qcom,mdss-dsi-ctrl # This should always come with an SoC-specific compatible
46 deprecated: true 41 deprecated: true
47 42
48 reg: 43 reg:
49 maxItems: 1 44 maxItems: 1
50 45
51 reg-names: 46 reg-names:
52 const: dsi_ctrl 47 const: dsi_ctrl
53 48
54 interrupts: 49 interrupts:
55 maxItems: 1 50 maxItems: 1
56 51
57 clocks: 52 clocks:
58 description: | 53 description: |
59 Several clocks are used, depending on th 54 Several clocks are used, depending on the variant. Typical ones are::
60 - bus:: Display AHB clock. 55 - bus:: Display AHB clock.
61 - byte:: Display byte clock. 56 - byte:: Display byte clock.
62 - byte_intf:: Display byte interface cl 57 - byte_intf:: Display byte interface clock.
63 - core:: Display core clock. 58 - core:: Display core clock.
64 - core_mss:: Core MultiMedia SubSystem 59 - core_mss:: Core MultiMedia SubSystem clock.
65 - iface:: Display AXI clock. 60 - iface:: Display AXI clock.
66 - mdp_core:: MDP Core clock. 61 - mdp_core:: MDP Core clock.
67 - mnoc:: MNOC clock 62 - mnoc:: MNOC clock
68 - pixel:: Display pixel clock. 63 - pixel:: Display pixel clock.
69 minItems: 3 64 minItems: 3
70 maxItems: 9 65 maxItems: 9
71 66
72 clock-names: 67 clock-names:
73 minItems: 3 68 minItems: 3
74 maxItems: 9 69 maxItems: 9
75 70
76 phys: 71 phys:
77 maxItems: 1 72 maxItems: 1
78 73
79 phy-names: 74 phy-names:
80 deprecated: true 75 deprecated: true
81 const: dsi 76 const: dsi
82 77
83 syscon-sfpb: 78 syscon-sfpb:
84 description: A phandle to mmss_sfpb syscon 79 description: A phandle to mmss_sfpb syscon node (only for DSIv2).
85 $ref: /schemas/types.yaml#/definitions/pha 80 $ref: /schemas/types.yaml#/definitions/phandle
86 81
87 qcom,dual-dsi-mode: 82 qcom,dual-dsi-mode:
88 type: boolean 83 type: boolean
89 description: | 84 description: |
90 Indicates if the DSI controller is drivi 85 Indicates if the DSI controller is driving a panel which needs
91 2 DSI links. 86 2 DSI links.
92 87
93 qcom,master-dsi: 88 qcom,master-dsi:
94 type: boolean 89 type: boolean
95 description: | 90 description: |
96 Indicates if the DSI controller is the m 91 Indicates if the DSI controller is the master DSI controller when
97 qcom,dual-dsi-mode enabled. 92 qcom,dual-dsi-mode enabled.
98 93
99 qcom,sync-dual-dsi: 94 qcom,sync-dual-dsi:
100 type: boolean 95 type: boolean
101 description: | 96 description: |
102 Indicates if the DSI controller needs to 97 Indicates if the DSI controller needs to sync the other DSI controller
103 with MIPI DCS commands when qcom,dual-ds 98 with MIPI DCS commands when qcom,dual-dsi-mode enabled.
104 99
105 assigned-clocks: 100 assigned-clocks:
106 minItems: 2 101 minItems: 2
107 maxItems: 4 102 maxItems: 4
108 description: | 103 description: |
109 Parents of "byte" and "pixel" for the gi 104 Parents of "byte" and "pixel" for the given platform.
110 For DSIv2 platforms this should contain 105 For DSIv2 platforms this should contain "byte", "esc", "src" and
111 "pixel_src" clocks. 106 "pixel_src" clocks.
112 107
113 assigned-clock-parents: 108 assigned-clock-parents:
114 minItems: 2 109 minItems: 2
115 maxItems: 4 110 maxItems: 4
116 description: | 111 description: |
117 The Byte clock and Pixel clock PLL outpu 112 The Byte clock and Pixel clock PLL outputs provided by a DSI PHY block.
118 113
119 power-domains: 114 power-domains:
120 maxItems: 1 115 maxItems: 1
121 116
122 operating-points-v2: true 117 operating-points-v2: true
123 118
124 opp-table: 119 opp-table:
125 type: object 120 type: object
126 121
127 ports: 122 ports:
128 $ref: /schemas/graph.yaml#/properties/port 123 $ref: /schemas/graph.yaml#/properties/ports
129 description: | 124 description: |
130 Contains DSI controller input and output 125 Contains DSI controller input and output ports as children, each
131 containing one endpoint subnode. 126 containing one endpoint subnode.
132 127
133 properties: 128 properties:
134 port@0: 129 port@0:
135 $ref: /schemas/graph.yaml#/$defs/port- 130 $ref: /schemas/graph.yaml#/$defs/port-base
136 unevaluatedProperties: false 131 unevaluatedProperties: false
137 description: | 132 description: |
138 Input endpoints of the controller. 133 Input endpoints of the controller.
139 properties: 134 properties:
140 endpoint: 135 endpoint:
141 $ref: /schemas/media/video-interfa 136 $ref: /schemas/media/video-interfaces.yaml#
142 unevaluatedProperties: false 137 unevaluatedProperties: false
143 properties: 138 properties:
144 data-lanes: 139 data-lanes:
145 maxItems: 4 140 maxItems: 4
146 minItems: 1 141 minItems: 1
147 items: 142 items:
148 enum: [ 0, 1, 2, 3 ] 143 enum: [ 0, 1, 2, 3 ]
149 144
150 port@1: 145 port@1:
151 $ref: /schemas/graph.yaml#/$defs/port- 146 $ref: /schemas/graph.yaml#/$defs/port-base
152 unevaluatedProperties: false 147 unevaluatedProperties: false
153 description: | 148 description: |
154 Output endpoints of the controller. 149 Output endpoints of the controller.
155 properties: 150 properties:
156 endpoint: 151 endpoint:
157 $ref: /schemas/media/video-interfa 152 $ref: /schemas/media/video-interfaces.yaml#
158 unevaluatedProperties: false 153 unevaluatedProperties: false
159 properties: 154 properties:
160 data-lanes: 155 data-lanes:
161 maxItems: 4 156 maxItems: 4
162 minItems: 1 157 minItems: 1
163 items: 158 items:
164 enum: [ 0, 1, 2, 3 ] 159 enum: [ 0, 1, 2, 3 ]
165 160
166 qcom,te-source: <<
167 $ref: /schemas/types.yaml#/def <<
168 description: <<
169 Specifies the source of vsyn <<
170 tearing elimination. <<
171 default: mdp_vsync_p <<
172 enum: <<
173 - mdp_vsync_p <<
174 - mdp_vsync_s <<
175 - mdp_vsync_e <<
176 - timer0 <<
177 - timer1 <<
178 - timer2 <<
179 - timer3 <<
180 - timer4 <<
181 <<
182 required: 161 required:
183 - port@0 162 - port@0
184 - port@1 163 - port@1
185 164
186 avdd-supply: 165 avdd-supply:
187 description: 166 description:
188 Phandle to vdd regulator device node 167 Phandle to vdd regulator device node
189 168
190 refgen-supply: <<
191 description: <<
192 Phandle to REFGEN regulator device node <<
193 <<
194 vcca-supply: 169 vcca-supply:
195 description: 170 description:
196 Phandle to vdd regulator device node 171 Phandle to vdd regulator device node
197 172
198 vdd-supply: 173 vdd-supply:
199 description: 174 description:
200 VDD regulator 175 VDD regulator
201 176
202 vddio-supply: 177 vddio-supply:
203 description: 178 description:
204 VDD-IO regulator 179 VDD-IO regulator
205 180
206 vdda-supply: 181 vdda-supply:
207 description: 182 description:
208 VDDA regulator 183 VDDA regulator
209 184
210 required: 185 required:
211 - compatible 186 - compatible
212 - reg 187 - reg
213 - reg-names 188 - reg-names
214 - interrupts 189 - interrupts
215 - clocks 190 - clocks
216 - clock-names 191 - clock-names
217 - phys 192 - phys
218 - assigned-clocks 193 - assigned-clocks
219 - assigned-clock-parents 194 - assigned-clock-parents
220 - ports 195 - ports
221 196
222 allOf: 197 allOf:
223 - $ref: ../dsi-controller.yaml# 198 - $ref: ../dsi-controller.yaml#
224 - if: 199 - if:
225 properties: 200 properties:
226 compatible: 201 compatible:
227 contains: 202 contains:
228 enum: 203 enum:
229 - qcom,apq8064-dsi-ctrl 204 - qcom,apq8064-dsi-ctrl
230 then: 205 then:
231 properties: 206 properties:
232 clocks: 207 clocks:
233 maxItems: 7 208 maxItems: 7
234 clock-names: 209 clock-names:
235 items: 210 items:
236 - const: iface 211 - const: iface
237 - const: bus 212 - const: bus
238 - const: core_mmss 213 - const: core_mmss
239 - const: src 214 - const: src
240 - const: byte 215 - const: byte
241 - const: pixel 216 - const: pixel
242 - const: core 217 - const: core
243 218
244 - if: 219 - if:
245 properties: 220 properties:
246 compatible: 221 compatible:
247 contains: 222 contains:
248 enum: 223 enum:
249 - qcom,msm8916-dsi-ctrl 224 - qcom,msm8916-dsi-ctrl
250 then: 225 then:
251 properties: 226 properties:
252 clocks: 227 clocks:
253 maxItems: 6 228 maxItems: 6
254 clock-names: 229 clock-names:
255 items: 230 items:
256 - const: mdp_core 231 - const: mdp_core
257 - const: iface 232 - const: iface
258 - const: bus 233 - const: bus
259 - const: byte 234 - const: byte
260 - const: pixel 235 - const: pixel
261 - const: core 236 - const: core
262 237
263 - if: 238 - if:
264 properties: 239 properties:
265 compatible: 240 compatible:
266 contains: 241 contains:
267 enum: 242 enum:
268 - qcom,msm8953-dsi-ctrl 243 - qcom,msm8953-dsi-ctrl
269 - qcom,msm8976-dsi-ctrl <<
270 then: 244 then:
271 properties: 245 properties:
272 clocks: 246 clocks:
273 maxItems: 6 247 maxItems: 6
274 clock-names: 248 clock-names:
275 items: 249 items:
276 - const: mdp_core 250 - const: mdp_core
277 - const: iface 251 - const: iface
278 - const: bus 252 - const: bus
279 - const: byte 253 - const: byte
280 - const: pixel 254 - const: pixel
281 - const: core 255 - const: core
282 256
283 - if: 257 - if:
284 properties: 258 properties:
285 compatible: 259 compatible:
286 contains: 260 contains:
287 enum: 261 enum:
288 - qcom,msm8226-dsi-ctrl 262 - qcom,msm8226-dsi-ctrl
289 - qcom,msm8974-dsi-ctrl 263 - qcom,msm8974-dsi-ctrl
290 then: 264 then:
291 properties: 265 properties:
292 clocks: 266 clocks:
293 maxItems: 7 267 maxItems: 7
294 clock-names: 268 clock-names:
295 items: 269 items:
296 - const: mdp_core 270 - const: mdp_core
297 - const: iface 271 - const: iface
298 - const: bus 272 - const: bus
299 - const: byte 273 - const: byte
300 - const: pixel 274 - const: pixel
301 - const: core 275 - const: core
302 - const: core_mmss 276 - const: core_mmss
303 277
304 - if: 278 - if:
305 properties: 279 properties:
306 compatible: 280 compatible:
307 contains: 281 contains:
308 enum: 282 enum:
309 - qcom,msm8996-dsi-ctrl 283 - qcom,msm8996-dsi-ctrl
310 then: 284 then:
311 properties: 285 properties:
312 clocks: 286 clocks:
313 maxItems: 7 287 maxItems: 7
314 clock-names: 288 clock-names:
315 items: 289 items:
316 - const: mdp_core 290 - const: mdp_core
317 - const: byte 291 - const: byte
318 - const: iface 292 - const: iface
319 - const: bus 293 - const: bus
320 - const: core_mmss 294 - const: core_mmss
321 - const: pixel 295 - const: pixel
322 - const: core 296 - const: core
323 297
324 - if: 298 - if:
325 properties: 299 properties:
326 compatible: 300 compatible:
327 contains: 301 contains:
328 enum: 302 enum:
329 - qcom,msm8998-dsi-ctrl 303 - qcom,msm8998-dsi-ctrl
330 - qcom,sm6125-dsi-ctrl <<
331 - qcom,sm6350-dsi-ctrl 304 - qcom,sm6350-dsi-ctrl
332 then: 305 then:
333 properties: 306 properties:
334 clocks: 307 clocks:
335 maxItems: 6 308 maxItems: 6
336 clock-names: 309 clock-names:
337 items: 310 items:
338 - const: byte 311 - const: byte
339 - const: byte_intf 312 - const: byte_intf
340 - const: pixel 313 - const: pixel
341 - const: core 314 - const: core
342 - const: iface 315 - const: iface
343 - const: bus 316 - const: bus
344 317
345 - if: 318 - if:
346 properties: 319 properties:
347 compatible: 320 compatible:
348 contains: 321 contains:
349 enum: 322 enum:
350 - qcom,sc7180-dsi-ctrl 323 - qcom,sc7180-dsi-ctrl
351 - qcom,sc7280-dsi-ctrl 324 - qcom,sc7280-dsi-ctrl
352 - qcom,sm7150-dsi-ctrl <<
353 - qcom,sm8150-dsi-ctrl 325 - qcom,sm8150-dsi-ctrl
354 - qcom,sm8250-dsi-ctrl 326 - qcom,sm8250-dsi-ctrl
355 - qcom,sm8350-dsi-ctrl 327 - qcom,sm8350-dsi-ctrl
356 - qcom,sm8450-dsi-ctrl 328 - qcom,sm8450-dsi-ctrl
357 - qcom,sm8550-dsi-ctrl 329 - qcom,sm8550-dsi-ctrl
358 - qcom,sm8650-dsi-ctrl <<
359 then: 330 then:
360 properties: 331 properties:
361 clocks: 332 clocks:
362 maxItems: 6 333 maxItems: 6
363 clock-names: 334 clock-names:
364 items: 335 items:
365 - const: byte 336 - const: byte
366 - const: byte_intf 337 - const: byte_intf
367 - const: pixel 338 - const: pixel
368 - const: core 339 - const: core
369 - const: iface 340 - const: iface
370 - const: bus 341 - const: bus
371 342
372 - if: 343 - if:
373 properties: 344 properties:
374 compatible: 345 compatible:
375 contains: 346 contains:
376 enum: 347 enum:
377 - qcom,sdm660-dsi-ctrl 348 - qcom,sdm660-dsi-ctrl
378 then: 349 then:
379 properties: 350 properties:
380 clocks: 351 clocks:
381 maxItems: 9 352 maxItems: 9
382 clock-names: 353 clock-names:
383 items: 354 items:
384 - const: mdp_core 355 - const: mdp_core
385 - const: byte 356 - const: byte
386 - const: byte_intf 357 - const: byte_intf
387 - const: mnoc 358 - const: mnoc
388 - const: iface 359 - const: iface
389 - const: bus 360 - const: bus
390 - const: core_mmss 361 - const: core_mmss
391 - const: pixel 362 - const: pixel
392 - const: core 363 - const: core
393 364
394 - if: 365 - if:
395 properties: 366 properties:
396 compatible: 367 compatible:
397 contains: 368 contains:
398 enum: 369 enum:
399 - qcom,sdm845-dsi-ctrl 370 - qcom,sdm845-dsi-ctrl
400 - qcom,sm6115-dsi-ctrl 371 - qcom,sm6115-dsi-ctrl
401 - qcom,sm6375-dsi-ctrl 372 - qcom,sm6375-dsi-ctrl
402 then: 373 then:
403 properties: 374 properties:
404 clocks: 375 clocks:
405 maxItems: 6 376 maxItems: 6
406 clock-names: 377 clock-names:
407 items: 378 items:
408 - const: byte 379 - const: byte
409 - const: byte_intf 380 - const: byte_intf
410 - const: pixel 381 - const: pixel
411 - const: core 382 - const: core
412 - const: iface 383 - const: iface
413 - const: bus 384 - const: bus
414 385
415 unevaluatedProperties: false 386 unevaluatedProperties: false
416 387
417 examples: 388 examples:
418 - | 389 - |
419 #include <dt-bindings/interrupt-controlle 390 #include <dt-bindings/interrupt-controller/arm-gic.h>
420 #include <dt-bindings/clock/qcom,dispcc-s 391 #include <dt-bindings/clock/qcom,dispcc-sdm845.h>
421 #include <dt-bindings/clock/qcom,gcc-sdm8 392 #include <dt-bindings/clock/qcom,gcc-sdm845.h>
422 #include <dt-bindings/power/qcom-rpmpd.h> 393 #include <dt-bindings/power/qcom-rpmpd.h>
423 394
424 dsi@ae94000 { 395 dsi@ae94000 {
425 compatible = "qcom,sc7180-dsi-ctrl" 396 compatible = "qcom,sc7180-dsi-ctrl", "qcom,mdss-dsi-ctrl";
426 reg = <0x0ae94000 0x400>; 397 reg = <0x0ae94000 0x400>;
427 reg-names = "dsi_ctrl"; 398 reg-names = "dsi_ctrl";
428 399
429 #address-cells = <1>; 400 #address-cells = <1>;
430 #size-cells = <0>; 401 #size-cells = <0>;
431 402
432 interrupt-parent = <&mdss>; 403 interrupt-parent = <&mdss>;
433 interrupts = <4>; 404 interrupts = <4>;
434 405
435 clocks = <&dispcc DISP_CC_MDSS_BYTE 406 clocks = <&dispcc DISP_CC_MDSS_BYTE0_CLK>,
436 <&dispcc DISP_CC_MDSS_BYTE 407 <&dispcc DISP_CC_MDSS_BYTE0_INTF_CLK>,
437 <&dispcc DISP_CC_MDSS_PCLK 408 <&dispcc DISP_CC_MDSS_PCLK0_CLK>,
438 <&dispcc DISP_CC_MDSS_ESC0 409 <&dispcc DISP_CC_MDSS_ESC0_CLK>,
439 <&dispcc DISP_CC_MDSS_AHB_ 410 <&dispcc DISP_CC_MDSS_AHB_CLK>,
440 <&dispcc DISP_CC_MDSS_AXI_ 411 <&dispcc DISP_CC_MDSS_AXI_CLK>;
441 clock-names = "byte", 412 clock-names = "byte",
442 "byte_intf", 413 "byte_intf",
443 "pixel", 414 "pixel",
444 "core", 415 "core",
445 "iface", 416 "iface",
446 "bus"; 417 "bus";
447 418
448 phys = <&dsi0_phy>; 419 phys = <&dsi0_phy>;
449 phy-names = "dsi"; 420 phy-names = "dsi";
450 421
451 assigned-clocks = <&dispcc DISP_CC_ 422 assigned-clocks = <&dispcc DISP_CC_MDSS_BYTE0_CLK_SRC>, <&dispcc DISP_CC_MDSS_PCLK0_CLK_SRC>;
452 assigned-clock-parents = <&dsi_phy 423 assigned-clock-parents = <&dsi_phy 0>, <&dsi_phy 1>;
453 424
454 power-domains = <&rpmhpd SC7180_CX> 425 power-domains = <&rpmhpd SC7180_CX>;
455 operating-points-v2 = <&dsi_opp_tab 426 operating-points-v2 = <&dsi_opp_table>;
456 427
457 ports { 428 ports {
458 #address-cells = <1>; 429 #address-cells = <1>;
459 #size-cells = <0>; 430 #size-cells = <0>;
460 431
461 port@0 { 432 port@0 {
462 reg = <0>; 433 reg = <0>;
463 dsi0_in: endpoint { 434 dsi0_in: endpoint {
464 remote-endp 435 remote-endpoint = <&dpu_intf1_out>;
465 }; 436 };
466 }; 437 };
467 438
468 port@1 { 439 port@1 {
469 reg = <1>; 440 reg = <1>;
470 dsi0_out: endpoint { 441 dsi0_out: endpoint {
471 remote-endp 442 remote-endpoint = <&sn65dsi86_in>;
472 data-lanes 443 data-lanes = <0 1 2 3>;
473 qcom,te-sou <<
474 }; 444 };
475 }; 445 };
476 }; 446 };
477 }; 447 };
478 ... 448 ...
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