1 # SPDX-License-Identifier: GPL-2.0-only OR BSD 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
2 %YAML 1.2 2 %YAML 1.2
3 --- 3 ---
4 $id: http://devicetree.org/schemas/display/msm 4 $id: http://devicetree.org/schemas/display/msm/dsi-controller-main.yaml#
5 $schema: http://devicetree.org/meta-schemas/co 5 $schema: http://devicetree.org/meta-schemas/core.yaml#
6 6
7 title: Qualcomm Display DSI controller 7 title: Qualcomm Display DSI controller
8 8
9 maintainers: 9 maintainers:
10 - Krishna Manikandan <quic_mkrishn@quicinc.co 10 - Krishna Manikandan <quic_mkrishn@quicinc.com>
11 11
12 properties: 12 properties:
13 compatible: 13 compatible:
14 oneOf: 14 oneOf:
15 - items: 15 - items:
16 - enum: 16 - enum:
17 - qcom,apq8064-dsi-ctrl 17 - qcom,apq8064-dsi-ctrl
18 - qcom,msm8226-dsi-ctrl 18 - qcom,msm8226-dsi-ctrl
19 - qcom,msm8916-dsi-ctrl 19 - qcom,msm8916-dsi-ctrl
20 - qcom,msm8953-dsi-ctrl 20 - qcom,msm8953-dsi-ctrl
21 - qcom,msm8974-dsi-ctrl 21 - qcom,msm8974-dsi-ctrl
22 - qcom,msm8976-dsi-ctrl <<
23 - qcom,msm8996-dsi-ctrl 22 - qcom,msm8996-dsi-ctrl
24 - qcom,msm8998-dsi-ctrl 23 - qcom,msm8998-dsi-ctrl
25 - qcom,qcm2290-dsi-ctrl 24 - qcom,qcm2290-dsi-ctrl
26 - qcom,sc7180-dsi-ctrl 25 - qcom,sc7180-dsi-ctrl
27 - qcom,sc7280-dsi-ctrl 26 - qcom,sc7280-dsi-ctrl
28 - qcom,sdm660-dsi-ctrl 27 - qcom,sdm660-dsi-ctrl
29 - qcom,sdm670-dsi-ctrl <<
30 - qcom,sdm845-dsi-ctrl 28 - qcom,sdm845-dsi-ctrl
31 - qcom,sm6115-dsi-ctrl 29 - qcom,sm6115-dsi-ctrl
32 - qcom,sm6125-dsi-ctrl 30 - qcom,sm6125-dsi-ctrl
33 - qcom,sm6350-dsi-ctrl 31 - qcom,sm6350-dsi-ctrl
34 - qcom,sm6375-dsi-ctrl 32 - qcom,sm6375-dsi-ctrl
35 - qcom,sm7150-dsi-ctrl <<
36 - qcom,sm8150-dsi-ctrl 33 - qcom,sm8150-dsi-ctrl
37 - qcom,sm8250-dsi-ctrl 34 - qcom,sm8250-dsi-ctrl
38 - qcom,sm8350-dsi-ctrl 35 - qcom,sm8350-dsi-ctrl
39 - qcom,sm8450-dsi-ctrl 36 - qcom,sm8450-dsi-ctrl
40 - qcom,sm8550-dsi-ctrl 37 - qcom,sm8550-dsi-ctrl
41 - qcom,sm8650-dsi-ctrl <<
42 - const: qcom,mdss-dsi-ctrl 38 - const: qcom,mdss-dsi-ctrl
43 - enum: 39 - enum:
44 - qcom,dsi-ctrl-6g-qcm2290 40 - qcom,dsi-ctrl-6g-qcm2290
45 - qcom,mdss-dsi-ctrl # This should a 41 - qcom,mdss-dsi-ctrl # This should always come with an SoC-specific compatible
46 deprecated: true 42 deprecated: true
47 43
48 reg: 44 reg:
49 maxItems: 1 45 maxItems: 1
50 46
51 reg-names: 47 reg-names:
52 const: dsi_ctrl 48 const: dsi_ctrl
53 49
54 interrupts: 50 interrupts:
55 maxItems: 1 51 maxItems: 1
56 52
57 clocks: 53 clocks:
58 description: | 54 description: |
59 Several clocks are used, depending on th 55 Several clocks are used, depending on the variant. Typical ones are::
60 - bus:: Display AHB clock. 56 - bus:: Display AHB clock.
61 - byte:: Display byte clock. 57 - byte:: Display byte clock.
62 - byte_intf:: Display byte interface cl 58 - byte_intf:: Display byte interface clock.
63 - core:: Display core clock. 59 - core:: Display core clock.
64 - core_mss:: Core MultiMedia SubSystem 60 - core_mss:: Core MultiMedia SubSystem clock.
65 - iface:: Display AXI clock. 61 - iface:: Display AXI clock.
66 - mdp_core:: MDP Core clock. 62 - mdp_core:: MDP Core clock.
67 - mnoc:: MNOC clock 63 - mnoc:: MNOC clock
68 - pixel:: Display pixel clock. 64 - pixel:: Display pixel clock.
69 minItems: 3 65 minItems: 3
70 maxItems: 9 66 maxItems: 9
71 67
72 clock-names: 68 clock-names:
73 minItems: 3 69 minItems: 3
74 maxItems: 9 70 maxItems: 9
75 71
76 phys: 72 phys:
77 maxItems: 1 73 maxItems: 1
78 74
79 phy-names: 75 phy-names:
80 deprecated: true 76 deprecated: true
81 const: dsi 77 const: dsi
82 78
83 syscon-sfpb: 79 syscon-sfpb:
84 description: A phandle to mmss_sfpb syscon 80 description: A phandle to mmss_sfpb syscon node (only for DSIv2).
85 $ref: /schemas/types.yaml#/definitions/pha 81 $ref: /schemas/types.yaml#/definitions/phandle
86 82
87 qcom,dual-dsi-mode: 83 qcom,dual-dsi-mode:
88 type: boolean 84 type: boolean
89 description: | 85 description: |
90 Indicates if the DSI controller is drivi 86 Indicates if the DSI controller is driving a panel which needs
91 2 DSI links. 87 2 DSI links.
92 88
93 qcom,master-dsi: 89 qcom,master-dsi:
94 type: boolean 90 type: boolean
95 description: | 91 description: |
96 Indicates if the DSI controller is the m 92 Indicates if the DSI controller is the master DSI controller when
97 qcom,dual-dsi-mode enabled. 93 qcom,dual-dsi-mode enabled.
98 94
99 qcom,sync-dual-dsi: 95 qcom,sync-dual-dsi:
100 type: boolean 96 type: boolean
101 description: | 97 description: |
102 Indicates if the DSI controller needs to 98 Indicates if the DSI controller needs to sync the other DSI controller
103 with MIPI DCS commands when qcom,dual-ds 99 with MIPI DCS commands when qcom,dual-dsi-mode enabled.
104 100
105 assigned-clocks: 101 assigned-clocks:
106 minItems: 2 102 minItems: 2
107 maxItems: 4 103 maxItems: 4
108 description: | 104 description: |
109 Parents of "byte" and "pixel" for the gi 105 Parents of "byte" and "pixel" for the given platform.
110 For DSIv2 platforms this should contain 106 For DSIv2 platforms this should contain "byte", "esc", "src" and
111 "pixel_src" clocks. 107 "pixel_src" clocks.
112 108
113 assigned-clock-parents: 109 assigned-clock-parents:
114 minItems: 2 110 minItems: 2
115 maxItems: 4 111 maxItems: 4
116 description: | 112 description: |
117 The Byte clock and Pixel clock PLL outpu 113 The Byte clock and Pixel clock PLL outputs provided by a DSI PHY block.
118 114
119 power-domains: 115 power-domains:
120 maxItems: 1 116 maxItems: 1
121 117
122 operating-points-v2: true 118 operating-points-v2: true
123 119
124 opp-table: 120 opp-table:
125 type: object 121 type: object
126 122
127 ports: 123 ports:
128 $ref: /schemas/graph.yaml#/properties/port 124 $ref: /schemas/graph.yaml#/properties/ports
129 description: | 125 description: |
130 Contains DSI controller input and output 126 Contains DSI controller input and output ports as children, each
131 containing one endpoint subnode. 127 containing one endpoint subnode.
132 128
133 properties: 129 properties:
134 port@0: 130 port@0:
135 $ref: /schemas/graph.yaml#/$defs/port- 131 $ref: /schemas/graph.yaml#/$defs/port-base
136 unevaluatedProperties: false 132 unevaluatedProperties: false
137 description: | 133 description: |
138 Input endpoints of the controller. 134 Input endpoints of the controller.
139 properties: 135 properties:
140 endpoint: 136 endpoint:
141 $ref: /schemas/media/video-interfa 137 $ref: /schemas/media/video-interfaces.yaml#
142 unevaluatedProperties: false 138 unevaluatedProperties: false
143 properties: 139 properties:
144 data-lanes: 140 data-lanes:
145 maxItems: 4 141 maxItems: 4
146 minItems: 1 142 minItems: 1
147 items: 143 items:
148 enum: [ 0, 1, 2, 3 ] 144 enum: [ 0, 1, 2, 3 ]
149 145
150 port@1: 146 port@1:
151 $ref: /schemas/graph.yaml#/$defs/port- 147 $ref: /schemas/graph.yaml#/$defs/port-base
152 unevaluatedProperties: false 148 unevaluatedProperties: false
153 description: | 149 description: |
154 Output endpoints of the controller. 150 Output endpoints of the controller.
155 properties: 151 properties:
156 endpoint: 152 endpoint:
157 $ref: /schemas/media/video-interfa 153 $ref: /schemas/media/video-interfaces.yaml#
158 unevaluatedProperties: false 154 unevaluatedProperties: false
159 properties: 155 properties:
160 data-lanes: 156 data-lanes:
161 maxItems: 4 157 maxItems: 4
162 minItems: 1 158 minItems: 1
163 items: 159 items:
164 enum: [ 0, 1, 2, 3 ] 160 enum: [ 0, 1, 2, 3 ]
165 161
166 qcom,te-source: <<
167 $ref: /schemas/types.yaml#/def <<
168 description: <<
169 Specifies the source of vsyn <<
170 tearing elimination. <<
171 default: mdp_vsync_p <<
172 enum: <<
173 - mdp_vsync_p <<
174 - mdp_vsync_s <<
175 - mdp_vsync_e <<
176 - timer0 <<
177 - timer1 <<
178 - timer2 <<
179 - timer3 <<
180 - timer4 <<
181 <<
182 required: 162 required:
183 - port@0 163 - port@0
184 - port@1 164 - port@1
185 165
186 avdd-supply: 166 avdd-supply:
187 description: 167 description:
188 Phandle to vdd regulator device node 168 Phandle to vdd regulator device node
189 169
190 refgen-supply: 170 refgen-supply:
191 description: 171 description:
192 Phandle to REFGEN regulator device node 172 Phandle to REFGEN regulator device node
193 173
194 vcca-supply: 174 vcca-supply:
195 description: 175 description:
196 Phandle to vdd regulator device node 176 Phandle to vdd regulator device node
197 177
198 vdd-supply: 178 vdd-supply:
199 description: 179 description:
200 VDD regulator 180 VDD regulator
201 181
202 vddio-supply: 182 vddio-supply:
203 description: 183 description:
204 VDD-IO regulator 184 VDD-IO regulator
205 185
206 vdda-supply: 186 vdda-supply:
207 description: 187 description:
208 VDDA regulator 188 VDDA regulator
209 189
210 required: 190 required:
211 - compatible 191 - compatible
212 - reg 192 - reg
213 - reg-names 193 - reg-names
214 - interrupts 194 - interrupts
215 - clocks 195 - clocks
216 - clock-names 196 - clock-names
217 - phys 197 - phys
218 - assigned-clocks 198 - assigned-clocks
219 - assigned-clock-parents 199 - assigned-clock-parents
220 - ports 200 - ports
221 201
222 allOf: 202 allOf:
223 - $ref: ../dsi-controller.yaml# 203 - $ref: ../dsi-controller.yaml#
224 - if: 204 - if:
225 properties: 205 properties:
226 compatible: 206 compatible:
227 contains: 207 contains:
228 enum: 208 enum:
229 - qcom,apq8064-dsi-ctrl 209 - qcom,apq8064-dsi-ctrl
230 then: 210 then:
231 properties: 211 properties:
232 clocks: 212 clocks:
233 maxItems: 7 213 maxItems: 7
234 clock-names: 214 clock-names:
235 items: 215 items:
236 - const: iface 216 - const: iface
237 - const: bus 217 - const: bus
238 - const: core_mmss 218 - const: core_mmss
239 - const: src 219 - const: src
240 - const: byte 220 - const: byte
241 - const: pixel 221 - const: pixel
242 - const: core 222 - const: core
243 223
244 - if: 224 - if:
245 properties: 225 properties:
246 compatible: 226 compatible:
247 contains: 227 contains:
248 enum: 228 enum:
249 - qcom,msm8916-dsi-ctrl 229 - qcom,msm8916-dsi-ctrl
250 then: 230 then:
251 properties: 231 properties:
252 clocks: 232 clocks:
253 maxItems: 6 233 maxItems: 6
254 clock-names: 234 clock-names:
255 items: 235 items:
256 - const: mdp_core 236 - const: mdp_core
257 - const: iface 237 - const: iface
258 - const: bus 238 - const: bus
259 - const: byte 239 - const: byte
260 - const: pixel 240 - const: pixel
261 - const: core 241 - const: core
262 242
263 - if: 243 - if:
264 properties: 244 properties:
265 compatible: 245 compatible:
266 contains: 246 contains:
267 enum: 247 enum:
268 - qcom,msm8953-dsi-ctrl 248 - qcom,msm8953-dsi-ctrl
269 - qcom,msm8976-dsi-ctrl <<
270 then: 249 then:
271 properties: 250 properties:
272 clocks: 251 clocks:
273 maxItems: 6 252 maxItems: 6
274 clock-names: 253 clock-names:
275 items: 254 items:
276 - const: mdp_core 255 - const: mdp_core
277 - const: iface 256 - const: iface
278 - const: bus 257 - const: bus
279 - const: byte 258 - const: byte
280 - const: pixel 259 - const: pixel
281 - const: core 260 - const: core
282 261
283 - if: 262 - if:
284 properties: 263 properties:
285 compatible: 264 compatible:
286 contains: 265 contains:
287 enum: 266 enum:
288 - qcom,msm8226-dsi-ctrl 267 - qcom,msm8226-dsi-ctrl
289 - qcom,msm8974-dsi-ctrl 268 - qcom,msm8974-dsi-ctrl
290 then: 269 then:
291 properties: 270 properties:
292 clocks: 271 clocks:
293 maxItems: 7 272 maxItems: 7
294 clock-names: 273 clock-names:
295 items: 274 items:
296 - const: mdp_core 275 - const: mdp_core
297 - const: iface 276 - const: iface
298 - const: bus 277 - const: bus
299 - const: byte 278 - const: byte
300 - const: pixel 279 - const: pixel
301 - const: core 280 - const: core
302 - const: core_mmss 281 - const: core_mmss
303 282
304 - if: 283 - if:
305 properties: 284 properties:
306 compatible: 285 compatible:
307 contains: 286 contains:
308 enum: 287 enum:
309 - qcom,msm8996-dsi-ctrl 288 - qcom,msm8996-dsi-ctrl
310 then: 289 then:
311 properties: 290 properties:
312 clocks: 291 clocks:
313 maxItems: 7 292 maxItems: 7
314 clock-names: 293 clock-names:
315 items: 294 items:
316 - const: mdp_core 295 - const: mdp_core
317 - const: byte 296 - const: byte
318 - const: iface 297 - const: iface
319 - const: bus 298 - const: bus
320 - const: core_mmss 299 - const: core_mmss
321 - const: pixel 300 - const: pixel
322 - const: core 301 - const: core
323 302
324 - if: 303 - if:
325 properties: 304 properties:
326 compatible: 305 compatible:
327 contains: 306 contains:
328 enum: 307 enum:
329 - qcom,msm8998-dsi-ctrl 308 - qcom,msm8998-dsi-ctrl
330 - qcom,sm6125-dsi-ctrl 309 - qcom,sm6125-dsi-ctrl
331 - qcom,sm6350-dsi-ctrl 310 - qcom,sm6350-dsi-ctrl
332 then: 311 then:
333 properties: 312 properties:
334 clocks: 313 clocks:
335 maxItems: 6 314 maxItems: 6
336 clock-names: 315 clock-names:
337 items: 316 items:
338 - const: byte 317 - const: byte
339 - const: byte_intf 318 - const: byte_intf
340 - const: pixel 319 - const: pixel
341 - const: core 320 - const: core
342 - const: iface 321 - const: iface
343 - const: bus 322 - const: bus
344 323
345 - if: 324 - if:
346 properties: 325 properties:
347 compatible: 326 compatible:
348 contains: 327 contains:
349 enum: 328 enum:
350 - qcom,sc7180-dsi-ctrl 329 - qcom,sc7180-dsi-ctrl
351 - qcom,sc7280-dsi-ctrl 330 - qcom,sc7280-dsi-ctrl
352 - qcom,sm7150-dsi-ctrl <<
353 - qcom,sm8150-dsi-ctrl 331 - qcom,sm8150-dsi-ctrl
354 - qcom,sm8250-dsi-ctrl 332 - qcom,sm8250-dsi-ctrl
355 - qcom,sm8350-dsi-ctrl 333 - qcom,sm8350-dsi-ctrl
356 - qcom,sm8450-dsi-ctrl 334 - qcom,sm8450-dsi-ctrl
357 - qcom,sm8550-dsi-ctrl 335 - qcom,sm8550-dsi-ctrl
358 - qcom,sm8650-dsi-ctrl <<
359 then: 336 then:
360 properties: 337 properties:
361 clocks: 338 clocks:
362 maxItems: 6 339 maxItems: 6
363 clock-names: 340 clock-names:
364 items: 341 items:
365 - const: byte 342 - const: byte
366 - const: byte_intf 343 - const: byte_intf
367 - const: pixel 344 - const: pixel
368 - const: core 345 - const: core
369 - const: iface 346 - const: iface
370 - const: bus 347 - const: bus
371 348
372 - if: 349 - if:
373 properties: 350 properties:
374 compatible: 351 compatible:
375 contains: 352 contains:
376 enum: 353 enum:
377 - qcom,sdm660-dsi-ctrl 354 - qcom,sdm660-dsi-ctrl
378 then: 355 then:
379 properties: 356 properties:
380 clocks: 357 clocks:
381 maxItems: 9 358 maxItems: 9
382 clock-names: 359 clock-names:
383 items: 360 items:
384 - const: mdp_core 361 - const: mdp_core
385 - const: byte 362 - const: byte
386 - const: byte_intf 363 - const: byte_intf
387 - const: mnoc 364 - const: mnoc
388 - const: iface 365 - const: iface
389 - const: bus 366 - const: bus
390 - const: core_mmss 367 - const: core_mmss
391 - const: pixel 368 - const: pixel
392 - const: core 369 - const: core
393 370
394 - if: 371 - if:
395 properties: 372 properties:
396 compatible: 373 compatible:
397 contains: 374 contains:
398 enum: 375 enum:
399 - qcom,sdm845-dsi-ctrl 376 - qcom,sdm845-dsi-ctrl
400 - qcom,sm6115-dsi-ctrl 377 - qcom,sm6115-dsi-ctrl
401 - qcom,sm6375-dsi-ctrl 378 - qcom,sm6375-dsi-ctrl
402 then: 379 then:
403 properties: 380 properties:
404 clocks: 381 clocks:
405 maxItems: 6 382 maxItems: 6
406 clock-names: 383 clock-names:
407 items: 384 items:
408 - const: byte 385 - const: byte
409 - const: byte_intf 386 - const: byte_intf
410 - const: pixel 387 - const: pixel
411 - const: core 388 - const: core
412 - const: iface 389 - const: iface
413 - const: bus 390 - const: bus
414 391
415 unevaluatedProperties: false 392 unevaluatedProperties: false
416 393
417 examples: 394 examples:
418 - | 395 - |
419 #include <dt-bindings/interrupt-controlle 396 #include <dt-bindings/interrupt-controller/arm-gic.h>
420 #include <dt-bindings/clock/qcom,dispcc-s 397 #include <dt-bindings/clock/qcom,dispcc-sdm845.h>
421 #include <dt-bindings/clock/qcom,gcc-sdm8 398 #include <dt-bindings/clock/qcom,gcc-sdm845.h>
422 #include <dt-bindings/power/qcom-rpmpd.h> 399 #include <dt-bindings/power/qcom-rpmpd.h>
423 400
424 dsi@ae94000 { 401 dsi@ae94000 {
425 compatible = "qcom,sc7180-dsi-ctrl" 402 compatible = "qcom,sc7180-dsi-ctrl", "qcom,mdss-dsi-ctrl";
426 reg = <0x0ae94000 0x400>; 403 reg = <0x0ae94000 0x400>;
427 reg-names = "dsi_ctrl"; 404 reg-names = "dsi_ctrl";
428 405
429 #address-cells = <1>; 406 #address-cells = <1>;
430 #size-cells = <0>; 407 #size-cells = <0>;
431 408
432 interrupt-parent = <&mdss>; 409 interrupt-parent = <&mdss>;
433 interrupts = <4>; 410 interrupts = <4>;
434 411
435 clocks = <&dispcc DISP_CC_MDSS_BYTE 412 clocks = <&dispcc DISP_CC_MDSS_BYTE0_CLK>,
436 <&dispcc DISP_CC_MDSS_BYTE 413 <&dispcc DISP_CC_MDSS_BYTE0_INTF_CLK>,
437 <&dispcc DISP_CC_MDSS_PCLK 414 <&dispcc DISP_CC_MDSS_PCLK0_CLK>,
438 <&dispcc DISP_CC_MDSS_ESC0 415 <&dispcc DISP_CC_MDSS_ESC0_CLK>,
439 <&dispcc DISP_CC_MDSS_AHB_ 416 <&dispcc DISP_CC_MDSS_AHB_CLK>,
440 <&dispcc DISP_CC_MDSS_AXI_ 417 <&dispcc DISP_CC_MDSS_AXI_CLK>;
441 clock-names = "byte", 418 clock-names = "byte",
442 "byte_intf", 419 "byte_intf",
443 "pixel", 420 "pixel",
444 "core", 421 "core",
445 "iface", 422 "iface",
446 "bus"; 423 "bus";
447 424
448 phys = <&dsi0_phy>; 425 phys = <&dsi0_phy>;
449 phy-names = "dsi"; 426 phy-names = "dsi";
450 427
451 assigned-clocks = <&dispcc DISP_CC_ 428 assigned-clocks = <&dispcc DISP_CC_MDSS_BYTE0_CLK_SRC>, <&dispcc DISP_CC_MDSS_PCLK0_CLK_SRC>;
452 assigned-clock-parents = <&dsi_phy 429 assigned-clock-parents = <&dsi_phy 0>, <&dsi_phy 1>;
453 430
454 power-domains = <&rpmhpd SC7180_CX> 431 power-domains = <&rpmhpd SC7180_CX>;
455 operating-points-v2 = <&dsi_opp_tab 432 operating-points-v2 = <&dsi_opp_table>;
456 433
457 ports { 434 ports {
458 #address-cells = <1>; 435 #address-cells = <1>;
459 #size-cells = <0>; 436 #size-cells = <0>;
460 437
461 port@0 { 438 port@0 {
462 reg = <0>; 439 reg = <0>;
463 dsi0_in: endpoint { 440 dsi0_in: endpoint {
464 remote-endp 441 remote-endpoint = <&dpu_intf1_out>;
465 }; 442 };
466 }; 443 };
467 444
468 port@1 { 445 port@1 {
469 reg = <1>; 446 reg = <1>;
470 dsi0_out: endpoint { 447 dsi0_out: endpoint {
471 remote-endp 448 remote-endpoint = <&sn65dsi86_in>;
472 data-lanes 449 data-lanes = <0 1 2 3>;
473 qcom,te-sou <<
474 }; 450 };
475 }; 451 };
476 }; 452 };
477 }; 453 };
478 ... 454 ...
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