1 # SPDX-License-Identifier: GPL-2.0-only OR BSD 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
2 %YAML 1.2 2 %YAML 1.2
3 --- 3 ---
4 $id: http://devicetree.org/schemas/display/msm 4 $id: http://devicetree.org/schemas/display/msm/dsi-controller-main.yaml#
5 $schema: http://devicetree.org/meta-schemas/co 5 $schema: http://devicetree.org/meta-schemas/core.yaml#
6 6
7 title: Qualcomm Display DSI controller 7 title: Qualcomm Display DSI controller
8 8
9 maintainers: 9 maintainers:
10 - Krishna Manikandan <quic_mkrishn@quicinc.co 10 - Krishna Manikandan <quic_mkrishn@quicinc.com>
11 11
12 properties: 12 properties:
13 compatible: 13 compatible:
14 oneOf: 14 oneOf:
15 - items: 15 - items:
16 - enum: 16 - enum:
17 - qcom,apq8064-dsi-ctrl 17 - qcom,apq8064-dsi-ctrl
18 - qcom,msm8226-dsi-ctrl 18 - qcom,msm8226-dsi-ctrl
19 - qcom,msm8916-dsi-ctrl 19 - qcom,msm8916-dsi-ctrl
20 - qcom,msm8953-dsi-ctrl 20 - qcom,msm8953-dsi-ctrl
21 - qcom,msm8974-dsi-ctrl 21 - qcom,msm8974-dsi-ctrl
22 - qcom,msm8976-dsi-ctrl <<
23 - qcom,msm8996-dsi-ctrl 22 - qcom,msm8996-dsi-ctrl
24 - qcom,msm8998-dsi-ctrl 23 - qcom,msm8998-dsi-ctrl
25 - qcom,qcm2290-dsi-ctrl 24 - qcom,qcm2290-dsi-ctrl
26 - qcom,sc7180-dsi-ctrl 25 - qcom,sc7180-dsi-ctrl
27 - qcom,sc7280-dsi-ctrl 26 - qcom,sc7280-dsi-ctrl
28 - qcom,sdm660-dsi-ctrl 27 - qcom,sdm660-dsi-ctrl
29 - qcom,sdm670-dsi-ctrl 28 - qcom,sdm670-dsi-ctrl
30 - qcom,sdm845-dsi-ctrl 29 - qcom,sdm845-dsi-ctrl
31 - qcom,sm6115-dsi-ctrl 30 - qcom,sm6115-dsi-ctrl
32 - qcom,sm6125-dsi-ctrl 31 - qcom,sm6125-dsi-ctrl
33 - qcom,sm6350-dsi-ctrl 32 - qcom,sm6350-dsi-ctrl
34 - qcom,sm6375-dsi-ctrl 33 - qcom,sm6375-dsi-ctrl
35 - qcom,sm7150-dsi-ctrl <<
36 - qcom,sm8150-dsi-ctrl 34 - qcom,sm8150-dsi-ctrl
37 - qcom,sm8250-dsi-ctrl 35 - qcom,sm8250-dsi-ctrl
38 - qcom,sm8350-dsi-ctrl 36 - qcom,sm8350-dsi-ctrl
39 - qcom,sm8450-dsi-ctrl 37 - qcom,sm8450-dsi-ctrl
40 - qcom,sm8550-dsi-ctrl 38 - qcom,sm8550-dsi-ctrl
41 - qcom,sm8650-dsi-ctrl 39 - qcom,sm8650-dsi-ctrl
42 - const: qcom,mdss-dsi-ctrl 40 - const: qcom,mdss-dsi-ctrl
43 - enum: 41 - enum:
44 - qcom,dsi-ctrl-6g-qcm2290 42 - qcom,dsi-ctrl-6g-qcm2290
45 - qcom,mdss-dsi-ctrl # This should a 43 - qcom,mdss-dsi-ctrl # This should always come with an SoC-specific compatible
46 deprecated: true 44 deprecated: true
47 45
48 reg: 46 reg:
49 maxItems: 1 47 maxItems: 1
50 48
51 reg-names: 49 reg-names:
52 const: dsi_ctrl 50 const: dsi_ctrl
53 51
54 interrupts: 52 interrupts:
55 maxItems: 1 53 maxItems: 1
56 54
57 clocks: 55 clocks:
58 description: | 56 description: |
59 Several clocks are used, depending on th 57 Several clocks are used, depending on the variant. Typical ones are::
60 - bus:: Display AHB clock. 58 - bus:: Display AHB clock.
61 - byte:: Display byte clock. 59 - byte:: Display byte clock.
62 - byte_intf:: Display byte interface cl 60 - byte_intf:: Display byte interface clock.
63 - core:: Display core clock. 61 - core:: Display core clock.
64 - core_mss:: Core MultiMedia SubSystem 62 - core_mss:: Core MultiMedia SubSystem clock.
65 - iface:: Display AXI clock. 63 - iface:: Display AXI clock.
66 - mdp_core:: MDP Core clock. 64 - mdp_core:: MDP Core clock.
67 - mnoc:: MNOC clock 65 - mnoc:: MNOC clock
68 - pixel:: Display pixel clock. 66 - pixel:: Display pixel clock.
69 minItems: 3 67 minItems: 3
70 maxItems: 9 68 maxItems: 9
71 69
72 clock-names: 70 clock-names:
73 minItems: 3 71 minItems: 3
74 maxItems: 9 72 maxItems: 9
75 73
76 phys: 74 phys:
77 maxItems: 1 75 maxItems: 1
78 76
79 phy-names: 77 phy-names:
80 deprecated: true 78 deprecated: true
81 const: dsi 79 const: dsi
82 80
83 syscon-sfpb: 81 syscon-sfpb:
84 description: A phandle to mmss_sfpb syscon 82 description: A phandle to mmss_sfpb syscon node (only for DSIv2).
85 $ref: /schemas/types.yaml#/definitions/pha 83 $ref: /schemas/types.yaml#/definitions/phandle
86 84
87 qcom,dual-dsi-mode: 85 qcom,dual-dsi-mode:
88 type: boolean 86 type: boolean
89 description: | 87 description: |
90 Indicates if the DSI controller is drivi 88 Indicates if the DSI controller is driving a panel which needs
91 2 DSI links. 89 2 DSI links.
92 90
93 qcom,master-dsi: 91 qcom,master-dsi:
94 type: boolean 92 type: boolean
95 description: | 93 description: |
96 Indicates if the DSI controller is the m 94 Indicates if the DSI controller is the master DSI controller when
97 qcom,dual-dsi-mode enabled. 95 qcom,dual-dsi-mode enabled.
98 96
99 qcom,sync-dual-dsi: 97 qcom,sync-dual-dsi:
100 type: boolean 98 type: boolean
101 description: | 99 description: |
102 Indicates if the DSI controller needs to 100 Indicates if the DSI controller needs to sync the other DSI controller
103 with MIPI DCS commands when qcom,dual-ds 101 with MIPI DCS commands when qcom,dual-dsi-mode enabled.
104 102
105 assigned-clocks: 103 assigned-clocks:
106 minItems: 2 104 minItems: 2
107 maxItems: 4 105 maxItems: 4
108 description: | 106 description: |
109 Parents of "byte" and "pixel" for the gi 107 Parents of "byte" and "pixel" for the given platform.
110 For DSIv2 platforms this should contain 108 For DSIv2 platforms this should contain "byte", "esc", "src" and
111 "pixel_src" clocks. 109 "pixel_src" clocks.
112 110
113 assigned-clock-parents: 111 assigned-clock-parents:
114 minItems: 2 112 minItems: 2
115 maxItems: 4 113 maxItems: 4
116 description: | 114 description: |
117 The Byte clock and Pixel clock PLL outpu 115 The Byte clock and Pixel clock PLL outputs provided by a DSI PHY block.
118 116
119 power-domains: 117 power-domains:
120 maxItems: 1 118 maxItems: 1
121 119
122 operating-points-v2: true 120 operating-points-v2: true
123 121
124 opp-table: 122 opp-table:
125 type: object 123 type: object
126 124
127 ports: 125 ports:
128 $ref: /schemas/graph.yaml#/properties/port 126 $ref: /schemas/graph.yaml#/properties/ports
129 description: | 127 description: |
130 Contains DSI controller input and output 128 Contains DSI controller input and output ports as children, each
131 containing one endpoint subnode. 129 containing one endpoint subnode.
132 130
133 properties: 131 properties:
134 port@0: 132 port@0:
135 $ref: /schemas/graph.yaml#/$defs/port- 133 $ref: /schemas/graph.yaml#/$defs/port-base
136 unevaluatedProperties: false 134 unevaluatedProperties: false
137 description: | 135 description: |
138 Input endpoints of the controller. 136 Input endpoints of the controller.
139 properties: 137 properties:
140 endpoint: 138 endpoint:
141 $ref: /schemas/media/video-interfa 139 $ref: /schemas/media/video-interfaces.yaml#
142 unevaluatedProperties: false 140 unevaluatedProperties: false
143 properties: 141 properties:
144 data-lanes: 142 data-lanes:
145 maxItems: 4 143 maxItems: 4
146 minItems: 1 144 minItems: 1
147 items: 145 items:
148 enum: [ 0, 1, 2, 3 ] 146 enum: [ 0, 1, 2, 3 ]
149 147
150 port@1: 148 port@1:
151 $ref: /schemas/graph.yaml#/$defs/port- 149 $ref: /schemas/graph.yaml#/$defs/port-base
152 unevaluatedProperties: false 150 unevaluatedProperties: false
153 description: | 151 description: |
154 Output endpoints of the controller. 152 Output endpoints of the controller.
155 properties: 153 properties:
156 endpoint: 154 endpoint:
157 $ref: /schemas/media/video-interfa 155 $ref: /schemas/media/video-interfaces.yaml#
158 unevaluatedProperties: false 156 unevaluatedProperties: false
159 properties: 157 properties:
160 data-lanes: 158 data-lanes:
161 maxItems: 4 159 maxItems: 4
162 minItems: 1 160 minItems: 1
163 items: 161 items:
164 enum: [ 0, 1, 2, 3 ] 162 enum: [ 0, 1, 2, 3 ]
165 163
166 qcom,te-source: <<
167 $ref: /schemas/types.yaml#/def <<
168 description: <<
169 Specifies the source of vsyn <<
170 tearing elimination. <<
171 default: mdp_vsync_p <<
172 enum: <<
173 - mdp_vsync_p <<
174 - mdp_vsync_s <<
175 - mdp_vsync_e <<
176 - timer0 <<
177 - timer1 <<
178 - timer2 <<
179 - timer3 <<
180 - timer4 <<
181 <<
182 required: 164 required:
183 - port@0 165 - port@0
184 - port@1 166 - port@1
185 167
186 avdd-supply: 168 avdd-supply:
187 description: 169 description:
188 Phandle to vdd regulator device node 170 Phandle to vdd regulator device node
189 171
190 refgen-supply: 172 refgen-supply:
191 description: 173 description:
192 Phandle to REFGEN regulator device node 174 Phandle to REFGEN regulator device node
193 175
194 vcca-supply: 176 vcca-supply:
195 description: 177 description:
196 Phandle to vdd regulator device node 178 Phandle to vdd regulator device node
197 179
198 vdd-supply: 180 vdd-supply:
199 description: 181 description:
200 VDD regulator 182 VDD regulator
201 183
202 vddio-supply: 184 vddio-supply:
203 description: 185 description:
204 VDD-IO regulator 186 VDD-IO regulator
205 187
206 vdda-supply: 188 vdda-supply:
207 description: 189 description:
208 VDDA regulator 190 VDDA regulator
209 191
210 required: 192 required:
211 - compatible 193 - compatible
212 - reg 194 - reg
213 - reg-names 195 - reg-names
214 - interrupts 196 - interrupts
215 - clocks 197 - clocks
216 - clock-names 198 - clock-names
217 - phys 199 - phys
218 - assigned-clocks 200 - assigned-clocks
219 - assigned-clock-parents 201 - assigned-clock-parents
220 - ports 202 - ports
221 203
222 allOf: 204 allOf:
223 - $ref: ../dsi-controller.yaml# 205 - $ref: ../dsi-controller.yaml#
224 - if: 206 - if:
225 properties: 207 properties:
226 compatible: 208 compatible:
227 contains: 209 contains:
228 enum: 210 enum:
229 - qcom,apq8064-dsi-ctrl 211 - qcom,apq8064-dsi-ctrl
230 then: 212 then:
231 properties: 213 properties:
232 clocks: 214 clocks:
233 maxItems: 7 215 maxItems: 7
234 clock-names: 216 clock-names:
235 items: 217 items:
236 - const: iface 218 - const: iface
237 - const: bus 219 - const: bus
238 - const: core_mmss 220 - const: core_mmss
239 - const: src 221 - const: src
240 - const: byte 222 - const: byte
241 - const: pixel 223 - const: pixel
242 - const: core 224 - const: core
243 225
244 - if: 226 - if:
245 properties: 227 properties:
246 compatible: 228 compatible:
247 contains: 229 contains:
248 enum: 230 enum:
249 - qcom,msm8916-dsi-ctrl 231 - qcom,msm8916-dsi-ctrl
250 then: 232 then:
251 properties: 233 properties:
252 clocks: 234 clocks:
253 maxItems: 6 235 maxItems: 6
254 clock-names: 236 clock-names:
255 items: 237 items:
256 - const: mdp_core 238 - const: mdp_core
257 - const: iface 239 - const: iface
258 - const: bus 240 - const: bus
259 - const: byte 241 - const: byte
260 - const: pixel 242 - const: pixel
261 - const: core 243 - const: core
262 244
263 - if: 245 - if:
264 properties: 246 properties:
265 compatible: 247 compatible:
266 contains: 248 contains:
267 enum: 249 enum:
268 - qcom,msm8953-dsi-ctrl 250 - qcom,msm8953-dsi-ctrl
269 - qcom,msm8976-dsi-ctrl <<
270 then: 251 then:
271 properties: 252 properties:
272 clocks: 253 clocks:
273 maxItems: 6 254 maxItems: 6
274 clock-names: 255 clock-names:
275 items: 256 items:
276 - const: mdp_core 257 - const: mdp_core
277 - const: iface 258 - const: iface
278 - const: bus 259 - const: bus
279 - const: byte 260 - const: byte
280 - const: pixel 261 - const: pixel
281 - const: core 262 - const: core
282 263
283 - if: 264 - if:
284 properties: 265 properties:
285 compatible: 266 compatible:
286 contains: 267 contains:
287 enum: 268 enum:
288 - qcom,msm8226-dsi-ctrl 269 - qcom,msm8226-dsi-ctrl
289 - qcom,msm8974-dsi-ctrl 270 - qcom,msm8974-dsi-ctrl
290 then: 271 then:
291 properties: 272 properties:
292 clocks: 273 clocks:
293 maxItems: 7 274 maxItems: 7
294 clock-names: 275 clock-names:
295 items: 276 items:
296 - const: mdp_core 277 - const: mdp_core
297 - const: iface 278 - const: iface
298 - const: bus 279 - const: bus
299 - const: byte 280 - const: byte
300 - const: pixel 281 - const: pixel
301 - const: core 282 - const: core
302 - const: core_mmss 283 - const: core_mmss
303 284
304 - if: 285 - if:
305 properties: 286 properties:
306 compatible: 287 compatible:
307 contains: 288 contains:
308 enum: 289 enum:
309 - qcom,msm8996-dsi-ctrl 290 - qcom,msm8996-dsi-ctrl
310 then: 291 then:
311 properties: 292 properties:
312 clocks: 293 clocks:
313 maxItems: 7 294 maxItems: 7
314 clock-names: 295 clock-names:
315 items: 296 items:
316 - const: mdp_core 297 - const: mdp_core
317 - const: byte 298 - const: byte
318 - const: iface 299 - const: iface
319 - const: bus 300 - const: bus
320 - const: core_mmss 301 - const: core_mmss
321 - const: pixel 302 - const: pixel
322 - const: core 303 - const: core
323 304
324 - if: 305 - if:
325 properties: 306 properties:
326 compatible: 307 compatible:
327 contains: 308 contains:
328 enum: 309 enum:
329 - qcom,msm8998-dsi-ctrl 310 - qcom,msm8998-dsi-ctrl
330 - qcom,sm6125-dsi-ctrl 311 - qcom,sm6125-dsi-ctrl
331 - qcom,sm6350-dsi-ctrl 312 - qcom,sm6350-dsi-ctrl
332 then: 313 then:
333 properties: 314 properties:
334 clocks: 315 clocks:
335 maxItems: 6 316 maxItems: 6
336 clock-names: 317 clock-names:
337 items: 318 items:
338 - const: byte 319 - const: byte
339 - const: byte_intf 320 - const: byte_intf
340 - const: pixel 321 - const: pixel
341 - const: core 322 - const: core
342 - const: iface 323 - const: iface
343 - const: bus 324 - const: bus
344 325
345 - if: 326 - if:
346 properties: 327 properties:
347 compatible: 328 compatible:
348 contains: 329 contains:
349 enum: 330 enum:
350 - qcom,sc7180-dsi-ctrl 331 - qcom,sc7180-dsi-ctrl
351 - qcom,sc7280-dsi-ctrl 332 - qcom,sc7280-dsi-ctrl
352 - qcom,sm7150-dsi-ctrl <<
353 - qcom,sm8150-dsi-ctrl 333 - qcom,sm8150-dsi-ctrl
354 - qcom,sm8250-dsi-ctrl 334 - qcom,sm8250-dsi-ctrl
355 - qcom,sm8350-dsi-ctrl 335 - qcom,sm8350-dsi-ctrl
356 - qcom,sm8450-dsi-ctrl 336 - qcom,sm8450-dsi-ctrl
357 - qcom,sm8550-dsi-ctrl 337 - qcom,sm8550-dsi-ctrl
358 - qcom,sm8650-dsi-ctrl 338 - qcom,sm8650-dsi-ctrl
359 then: 339 then:
360 properties: 340 properties:
361 clocks: 341 clocks:
362 maxItems: 6 342 maxItems: 6
363 clock-names: 343 clock-names:
364 items: 344 items:
365 - const: byte 345 - const: byte
366 - const: byte_intf 346 - const: byte_intf
367 - const: pixel 347 - const: pixel
368 - const: core 348 - const: core
369 - const: iface 349 - const: iface
370 - const: bus 350 - const: bus
371 351
372 - if: 352 - if:
373 properties: 353 properties:
374 compatible: 354 compatible:
375 contains: 355 contains:
376 enum: 356 enum:
377 - qcom,sdm660-dsi-ctrl 357 - qcom,sdm660-dsi-ctrl
378 then: 358 then:
379 properties: 359 properties:
380 clocks: 360 clocks:
381 maxItems: 9 361 maxItems: 9
382 clock-names: 362 clock-names:
383 items: 363 items:
384 - const: mdp_core 364 - const: mdp_core
385 - const: byte 365 - const: byte
386 - const: byte_intf 366 - const: byte_intf
387 - const: mnoc 367 - const: mnoc
388 - const: iface 368 - const: iface
389 - const: bus 369 - const: bus
390 - const: core_mmss 370 - const: core_mmss
391 - const: pixel 371 - const: pixel
392 - const: core 372 - const: core
393 373
394 - if: 374 - if:
395 properties: 375 properties:
396 compatible: 376 compatible:
397 contains: 377 contains:
398 enum: 378 enum:
399 - qcom,sdm845-dsi-ctrl 379 - qcom,sdm845-dsi-ctrl
400 - qcom,sm6115-dsi-ctrl 380 - qcom,sm6115-dsi-ctrl
401 - qcom,sm6375-dsi-ctrl 381 - qcom,sm6375-dsi-ctrl
402 then: 382 then:
403 properties: 383 properties:
404 clocks: 384 clocks:
405 maxItems: 6 385 maxItems: 6
406 clock-names: 386 clock-names:
407 items: 387 items:
408 - const: byte 388 - const: byte
409 - const: byte_intf 389 - const: byte_intf
410 - const: pixel 390 - const: pixel
411 - const: core 391 - const: core
412 - const: iface 392 - const: iface
413 - const: bus 393 - const: bus
414 394
415 unevaluatedProperties: false 395 unevaluatedProperties: false
416 396
417 examples: 397 examples:
418 - | 398 - |
419 #include <dt-bindings/interrupt-controlle 399 #include <dt-bindings/interrupt-controller/arm-gic.h>
420 #include <dt-bindings/clock/qcom,dispcc-s 400 #include <dt-bindings/clock/qcom,dispcc-sdm845.h>
421 #include <dt-bindings/clock/qcom,gcc-sdm8 401 #include <dt-bindings/clock/qcom,gcc-sdm845.h>
422 #include <dt-bindings/power/qcom-rpmpd.h> 402 #include <dt-bindings/power/qcom-rpmpd.h>
423 403
424 dsi@ae94000 { 404 dsi@ae94000 {
425 compatible = "qcom,sc7180-dsi-ctrl" 405 compatible = "qcom,sc7180-dsi-ctrl", "qcom,mdss-dsi-ctrl";
426 reg = <0x0ae94000 0x400>; 406 reg = <0x0ae94000 0x400>;
427 reg-names = "dsi_ctrl"; 407 reg-names = "dsi_ctrl";
428 408
429 #address-cells = <1>; 409 #address-cells = <1>;
430 #size-cells = <0>; 410 #size-cells = <0>;
431 411
432 interrupt-parent = <&mdss>; 412 interrupt-parent = <&mdss>;
433 interrupts = <4>; 413 interrupts = <4>;
434 414
435 clocks = <&dispcc DISP_CC_MDSS_BYTE 415 clocks = <&dispcc DISP_CC_MDSS_BYTE0_CLK>,
436 <&dispcc DISP_CC_MDSS_BYTE 416 <&dispcc DISP_CC_MDSS_BYTE0_INTF_CLK>,
437 <&dispcc DISP_CC_MDSS_PCLK 417 <&dispcc DISP_CC_MDSS_PCLK0_CLK>,
438 <&dispcc DISP_CC_MDSS_ESC0 418 <&dispcc DISP_CC_MDSS_ESC0_CLK>,
439 <&dispcc DISP_CC_MDSS_AHB_ 419 <&dispcc DISP_CC_MDSS_AHB_CLK>,
440 <&dispcc DISP_CC_MDSS_AXI_ 420 <&dispcc DISP_CC_MDSS_AXI_CLK>;
441 clock-names = "byte", 421 clock-names = "byte",
442 "byte_intf", 422 "byte_intf",
443 "pixel", 423 "pixel",
444 "core", 424 "core",
445 "iface", 425 "iface",
446 "bus"; 426 "bus";
447 427
448 phys = <&dsi0_phy>; 428 phys = <&dsi0_phy>;
449 phy-names = "dsi"; 429 phy-names = "dsi";
450 430
451 assigned-clocks = <&dispcc DISP_CC_ 431 assigned-clocks = <&dispcc DISP_CC_MDSS_BYTE0_CLK_SRC>, <&dispcc DISP_CC_MDSS_PCLK0_CLK_SRC>;
452 assigned-clock-parents = <&dsi_phy 432 assigned-clock-parents = <&dsi_phy 0>, <&dsi_phy 1>;
453 433
454 power-domains = <&rpmhpd SC7180_CX> 434 power-domains = <&rpmhpd SC7180_CX>;
455 operating-points-v2 = <&dsi_opp_tab 435 operating-points-v2 = <&dsi_opp_table>;
456 436
457 ports { 437 ports {
458 #address-cells = <1>; 438 #address-cells = <1>;
459 #size-cells = <0>; 439 #size-cells = <0>;
460 440
461 port@0 { 441 port@0 {
462 reg = <0>; 442 reg = <0>;
463 dsi0_in: endpoint { 443 dsi0_in: endpoint {
464 remote-endp 444 remote-endpoint = <&dpu_intf1_out>;
465 }; 445 };
466 }; 446 };
467 447
468 port@1 { 448 port@1 {
469 reg = <1>; 449 reg = <1>;
470 dsi0_out: endpoint { 450 dsi0_out: endpoint {
471 remote-endp 451 remote-endpoint = <&sn65dsi86_in>;
472 data-lanes 452 data-lanes = <0 1 2 3>;
473 qcom,te-sou <<
474 }; 453 };
475 }; 454 };
476 }; 455 };
477 }; 456 };
478 ... 457 ...
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