1 # SPDX-License-Identifier: (GPL-2.0-only OR BS !! 1 # SPDX-License-Identifier: (GPL-2.0-only or BSD-2-Clause)
2 %YAML 1.2 2 %YAML 1.2
3 --- 3 ---
4 $id: http://devicetree.org/schemas/display/pan 4 $id: http://devicetree.org/schemas/display/panel/panel-mipi-dbi-spi.yaml#
5 $schema: http://devicetree.org/meta-schemas/co 5 $schema: http://devicetree.org/meta-schemas/core.yaml#
6 6
7 title: MIPI DBI SPI Panel 7 title: MIPI DBI SPI Panel
8 8
9 maintainers: 9 maintainers:
10 - Noralf Trønnes <noralf@tronnes.org> 10 - Noralf Trønnes <noralf@tronnes.org>
11 11
12 description: | 12 description: |
13 This binding is for display panels using a M 13 This binding is for display panels using a MIPI DBI compatible controller
14 in SPI mode. 14 in SPI mode.
15 15
16 The MIPI Alliance Standard for Display Bus I 16 The MIPI Alliance Standard for Display Bus Interface defines the electrical
17 and logical interfaces for display controlle 17 and logical interfaces for display controllers historically used in mobile
18 phones. The standard defines 4 display archi 18 phones. The standard defines 4 display architecture types and this binding is
19 for type 1 which has full frame memory. Ther 19 for type 1 which has full frame memory. There are 3 interface types in the
20 standard and type C is the serial interface. 20 standard and type C is the serial interface.
21 21
22 The standard defines the following interface 22 The standard defines the following interface signals for type C:
23 - Power: 23 - Power:
24 - Vdd: Power supply for display module 24 - Vdd: Power supply for display module
25 Called power-supply in this binding. 25 Called power-supply in this binding.
26 - Vddi: Logic level supply for interface s 26 - Vddi: Logic level supply for interface signals
27 Called io-supply in this binding. 27 Called io-supply in this binding.
28 - Interface: 28 - Interface:
29 - CSx: Chip select 29 - CSx: Chip select
30 - SCL: Serial clock 30 - SCL: Serial clock
31 - Dout: Serial out 31 - Dout: Serial out
32 - Din: Serial in 32 - Din: Serial in
33 - SDA: Bidrectional in/out 33 - SDA: Bidrectional in/out
34 - D/CX: Data/command selection, high=data, 34 - D/CX: Data/command selection, high=data, low=command
35 Called dc-gpios in this binding. 35 Called dc-gpios in this binding.
36 - RESX: Reset when low 36 - RESX: Reset when low
37 Called reset-gpios in this binding. 37 Called reset-gpios in this binding.
38 38
39 The type C interface has 3 options: 39 The type C interface has 3 options:
40 40
41 - Option 1: 9-bit mode and D/CX as the 9th 41 - Option 1: 9-bit mode and D/CX as the 9th bit
42 | Command | t 42 | Command | the next command or following data |
43 |<0><D7><D6><D5><D4><D3><D2><D1><D0>|<D/ 43 |<0><D7><D6><D5><D4><D3><D2><D1><D0>|<D/CX><D7><D6><D5><D4><D3><D2><D1><D0>|
44 44
45 - Option 2: 16-bit mode and D/CX as a 9th 45 - Option 2: 16-bit mode and D/CX as a 9th bit
46 | Command or data 46 | Command or data |
47 |<X><X><X><X><X><X><X><D/CX><D7><D6><D5> 47 |<X><X><X><X><X><X><X><D/CX><D7><D6><D5><D4><D3><D2><D1><D0>|
48 48
49 - Option 3: 8-bit mode and D/CX as a separ 49 - Option 3: 8-bit mode and D/CX as a separate interface line
50 | Command or data | 50 | Command or data |
51 |<D7><D6><D5><D4><D3><D2><D1><D0>| 51 |<D7><D6><D5><D4><D3><D2><D1><D0>|
52 52
53 The standard defines one pixel format for ty <<
54 however has decided to provide the type A/B <<
55 the Type C interface and most common among t <<
56 The MIPI DCS command set_address_mode (36h) <<
57 order. This gives each supported RGB format <<
58 <<
59 The panel resolution is specified using the 53 The panel resolution is specified using the panel-timing node properties
60 hactive (width) and vactive (height). The ot 54 hactive (width) and vactive (height). The other mandatory panel-timing
61 properties should be set to zero except cloc 55 properties should be set to zero except clock-frequency which can be
62 optionally set to inform about the actual pi 56 optionally set to inform about the actual pixel clock frequency.
63 57
64 If the panel is wired to the controller at a 58 If the panel is wired to the controller at an offset specify this using
65 hback-porch (x-offset) and vback-porch (y-of 59 hback-porch (x-offset) and vback-porch (y-offset).
66 60
67 allOf: 61 allOf:
68 - $ref: panel-common.yaml# 62 - $ref: panel-common.yaml#
69 - $ref: /schemas/spi/spi-peripheral-props.ya 63 - $ref: /schemas/spi/spi-peripheral-props.yaml#
70 64
71 properties: 65 properties:
72 compatible: 66 compatible:
73 items: 67 items:
74 - enum: 68 - enum:
75 - saef,sftc154b <<
76 - sainsmart18 69 - sainsmart18
77 - shineworld,lh133k <<
78 - const: panel-mipi-dbi-spi 70 - const: panel-mipi-dbi-spi
79 71
80 reg: <<
81 maxItems: 1 <<
82 <<
83 write-only: 72 write-only:
84 type: boolean 73 type: boolean
85 description: 74 description:
86 Controller is not readable (ie. Din (MIS 75 Controller is not readable (ie. Din (MISO on the SPI interface) is not
87 wired up). 76 wired up).
88 77
89 dc-gpios: 78 dc-gpios:
90 maxItems: 1 79 maxItems: 1
91 description: | 80 description: |
92 Controller data/command selection (D/CX) 81 Controller data/command selection (D/CX) in 4-line SPI mode.
93 If not set, the controller is in 3-line 82 If not set, the controller is in 3-line SPI mode.
94 83
95 io-supply: 84 io-supply:
96 description: | 85 description: |
97 Logic level supply for interface signals 86 Logic level supply for interface signals (Vddi).
98 No need to set if this is the same as po 87 No need to set if this is the same as power-supply.
99 88
100 spi-3wire: true <<
101 <<
102 format: <<
103 description: > <<
104 Pixel format in bit order as going on th <<
105 * `x2r1g1b1r1g1b1` - RGB111, 2 pixels <<
106 * `x2b1g1r1b1g1r1` - BGR111, 2 pixels <<
107 * `x1r1g1b1x1r1g1b1` - RGB111, 2 pixel <<
108 * `x1b1g1r1x1b1g1r1` - BGR111, 2 pixel <<
109 * `r5g6b5` - RGB565, 2 bytes <<
110 * `b5g6r5` - BGR565, 2 bytes <<
111 * `r6x2g6x2b6x2` - RGB666, 3 bytes <<
112 * `b6x2g6x2r6x2` - BGR666, 3 bytes <<
113 enum: <<
114 - x2r1g1b1r1g1b1 <<
115 - x2b1g1r1b1g1r1 <<
116 - x1r1g1b1x1r1g1b1 <<
117 - x1b1g1r1x1b1g1r1 <<
118 - r5g6b5 <<
119 - b5g6r5 <<
120 - r6x2g6x2b6x2 <<
121 - b6x2g6x2r6x2 <<
122 default: r5g6b5 <<
123 <<
124 required: 89 required:
125 - compatible 90 - compatible
126 - reg 91 - reg
127 - width-mm 92 - width-mm
128 - height-mm 93 - height-mm
129 - panel-timing 94 - panel-timing
130 95
131 unevaluatedProperties: false 96 unevaluatedProperties: false
132 97
133 examples: 98 examples:
134 - | 99 - |
135 #include <dt-bindings/gpio/gpio.h> 100 #include <dt-bindings/gpio/gpio.h>
136 101
137 spi { 102 spi {
138 #address-cells = <1>; 103 #address-cells = <1>;
139 #size-cells = <0>; 104 #size-cells = <0>;
140 105
141 display@0{ 106 display@0{
142 compatible = "sainsmart18", "panel 107 compatible = "sainsmart18", "panel-mipi-dbi-spi";
143 reg = <0>; 108 reg = <0>;
144 spi-max-frequency = <40000000>; 109 spi-max-frequency = <40000000>;
145 110
146 dc-gpios = <&gpio 24 GPIO_ACTIVE_H 111 dc-gpios = <&gpio 24 GPIO_ACTIVE_HIGH>;
147 reset-gpios = <&gpio 25 GPIO_ACTIV 112 reset-gpios = <&gpio 25 GPIO_ACTIVE_HIGH>;
148 write-only; 113 write-only;
149 <<
150 format = "r5g6b5"; <<
151 114
152 backlight = <&backlight>; 115 backlight = <&backlight>;
153 116
154 width-mm = <35>; 117 width-mm = <35>;
155 height-mm = <28>; 118 height-mm = <28>;
156 119
157 panel-timing { 120 panel-timing {
158 hactive = <160>; 121 hactive = <160>;
159 vactive = <128>; 122 vactive = <128>;
160 hback-porch = <0>; 123 hback-porch = <0>;
161 vback-porch = <0>; 124 vback-porch = <0>;
162 clock-frequency = <0>; 125 clock-frequency = <0>;
163 hfront-porch = <0>; 126 hfront-porch = <0>;
164 hsync-len = <0>; 127 hsync-len = <0>;
165 vfront-porch = <0>; 128 vfront-porch = <0>;
166 vsync-len = <0>; 129 vsync-len = <0>;
167 }; 130 };
168 }; 131 };
169 }; 132 };
170 133
171 ... 134 ...
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