1 # SPDX-License-Identifier: (GPL-2.0-only OR BS 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2 %YAML 1.2 2 %YAML 1.2
3 --- 3 ---
4 $id: http://devicetree.org/schemas/display/teg 4 $id: http://devicetree.org/schemas/display/tegra/nvidia,tegra20-gr2d.yaml#
5 $schema: http://devicetree.org/meta-schemas/co 5 $schema: http://devicetree.org/meta-schemas/core.yaml#
6 6
7 title: NVIDIA 2D graphics engine 7 title: NVIDIA 2D graphics engine
8 8
9 maintainers: 9 maintainers:
10 - Thierry Reding <thierry.reding@gmail.com> 10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com> 11 - Jon Hunter <jonathanh@nvidia.com>
12 12
13 properties: 13 properties:
14 $nodename: 14 $nodename:
15 pattern: "^gr2d@[0-9a-f]+$" 15 pattern: "^gr2d@[0-9a-f]+$"
16 16
17 compatible: 17 compatible:
18 enum: 18 enum:
19 - nvidia,tegra20-gr2d 19 - nvidia,tegra20-gr2d
20 - nvidia,tegra30-gr2d 20 - nvidia,tegra30-gr2d
21 - nvidia,tegra114-gr2d 21 - nvidia,tegra114-gr2d
22 22
23 reg: 23 reg:
24 maxItems: 1 24 maxItems: 1
25 25
26 interrupts: 26 interrupts:
27 maxItems: 1 27 maxItems: 1
28 28
29 clocks: 29 clocks:
30 items: 30 items:
31 - description: module clock 31 - description: module clock
32 32
33 resets: 33 resets:
34 items: 34 items:
35 - description: module reset 35 - description: module reset
36 - description: memory client hotflush re 36 - description: memory client hotflush reset
37 37
38 reset-names: 38 reset-names:
39 items: 39 items:
40 - const: 2d 40 - const: 2d
41 - const: mc 41 - const: mc
42 42
43 iommus: 43 iommus:
44 maxItems: 1 44 maxItems: 1
45 45
46 interconnects: 46 interconnects:
47 maxItems: 4 47 maxItems: 4
48 48
49 interconnect-names: 49 interconnect-names:
50 maxItems: 4 50 maxItems: 4
51 51
52 operating-points-v2: true 52 operating-points-v2: true
53 53
54 power-domains: 54 power-domains:
55 items: 55 items:
56 - description: phandle to the HEG or cor 56 - description: phandle to the HEG or core power domain
57 57
58 additionalProperties: false 58 additionalProperties: false
59 59
60 examples: 60 examples:
61 - | 61 - |
62 #include <dt-bindings/clock/tegra20-car.h> 62 #include <dt-bindings/clock/tegra20-car.h>
63 #include <dt-bindings/interrupt-controller 63 #include <dt-bindings/interrupt-controller/arm-gic.h>
64 #include <dt-bindings/memory/tegra20-mc.h> 64 #include <dt-bindings/memory/tegra20-mc.h>
65 65
66 gr2d@54140000 { 66 gr2d@54140000 {
67 compatible = "nvidia,tegra20-gr2d"; 67 compatible = "nvidia,tegra20-gr2d";
68 reg = <0x54140000 0x00040000>; 68 reg = <0x54140000 0x00040000>;
69 interrupts = <GIC_SPI 72 IRQ_TYPE_LEVE 69 interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>;
70 clocks = <&tegra_car TEGRA20_CLK_GR2D> 70 clocks = <&tegra_car TEGRA20_CLK_GR2D>;
71 resets = <&tegra_car 21>, <&mc TEGRA20 71 resets = <&tegra_car 21>, <&mc TEGRA20_MC_RESET_2D>;
72 reset-names = "2d", "mc"; 72 reset-names = "2d", "mc";
73 }; 73 };
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