1 # SPDX-License-Identifier: (GPL-2.0-only OR BS 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2 %YAML 1.2 2 %YAML 1.2
3 --- 3 ---
4 $id: http://devicetree.org/schemas/dma/qcom,gp 4 $id: http://devicetree.org/schemas/dma/qcom,gpi.yaml#
5 $schema: http://devicetree.org/meta-schemas/co 5 $schema: http://devicetree.org/meta-schemas/core.yaml#
6 6
7 title: Qualcomm Technologies Inc GPI DMA contr 7 title: Qualcomm Technologies Inc GPI DMA controller
8 8
9 maintainers: 9 maintainers:
10 - Vinod Koul <vkoul@kernel.org> 10 - Vinod Koul <vkoul@kernel.org>
11 11
12 description: | 12 description: |
13 QCOM GPI DMA controller provides DMA capabil 13 QCOM GPI DMA controller provides DMA capabilities for
14 peripheral buses such as I2C, UART, and SPI. 14 peripheral buses such as I2C, UART, and SPI.
15 15
16 allOf: 16 allOf:
17 - $ref: dma-controller.yaml# !! 17 - $ref: "dma-controller.yaml#"
18 18
19 properties: 19 properties:
20 compatible: 20 compatible:
21 oneOf: 21 oneOf:
22 - enum: 22 - enum:
23 - qcom,sdm845-gpi-dma 23 - qcom,sdm845-gpi-dma
24 - qcom,sm6350-gpi-dma 24 - qcom,sm6350-gpi-dma
25 - items: 25 - items:
26 - enum: 26 - enum:
27 - qcom,qcm2290-gpi-dma <<
28 - qcom,qdu1000-gpi-dma <<
29 - qcom,sc7280-gpi-dma 27 - qcom,sc7280-gpi-dma
30 - qcom,sdx75-gpi-dma <<
31 - qcom,sm6115-gpi-dma 28 - qcom,sm6115-gpi-dma
32 - qcom,sm6375-gpi-dma 29 - qcom,sm6375-gpi-dma
33 - qcom,sm8350-gpi-dma 30 - qcom,sm8350-gpi-dma
34 - qcom,sm8450-gpi-dma 31 - qcom,sm8450-gpi-dma
35 - qcom,sm8550-gpi-dma <<
36 - qcom,sm8650-gpi-dma <<
37 - qcom,x1e80100-gpi-dma <<
38 - const: qcom,sm6350-gpi-dma 32 - const: qcom,sm6350-gpi-dma
39 - items: 33 - items:
40 - enum: 34 - enum:
41 - qcom,sdm670-gpi-dma 35 - qcom,sdm670-gpi-dma
42 - qcom,sm6125-gpi-dma <<
43 - qcom,sm8150-gpi-dma 36 - qcom,sm8150-gpi-dma
44 - qcom,sm8250-gpi-dma 37 - qcom,sm8250-gpi-dma
45 - const: qcom,sdm845-gpi-dma 38 - const: qcom,sdm845-gpi-dma
46 39
47 reg: 40 reg:
48 maxItems: 1 41 maxItems: 1
49 42
50 interrupts: 43 interrupts:
51 description: 44 description:
52 Interrupt lines for each GPI instance 45 Interrupt lines for each GPI instance
53 minItems: 1 46 minItems: 1
54 maxItems: 13 47 maxItems: 13
55 48
56 "#dma-cells": 49 "#dma-cells":
57 const: 3 50 const: 3
58 description: > 51 description: >
59 DMA clients must use the format describe 52 DMA clients must use the format described in dma.txt, giving a phandle
60 to the DMA controller plus the following 53 to the DMA controller plus the following 3 integer cells:
61 - channel: if set to 0xffffffff, any ava 54 - channel: if set to 0xffffffff, any available channel will be allocated
62 for the client. Otherwise, the exact c 55 for the client. Otherwise, the exact channel specified will be used.
63 - seid: serial id of the client as defin 56 - seid: serial id of the client as defined in the SoC documentation.
64 - client: type of the client as defined 57 - client: type of the client as defined in dt-bindings/dma/qcom-gpi.h
65 58
66 iommus: 59 iommus:
67 maxItems: 1 60 maxItems: 1
68 61
69 dma-channels: 62 dma-channels:
70 maximum: 31 63 maximum: 31
71 64
72 dma-channel-mask: 65 dma-channel-mask:
73 maxItems: 1 66 maxItems: 1
74 <<
75 dma-coherent: true <<
76 67
77 required: 68 required:
78 - compatible 69 - compatible
79 - reg 70 - reg
80 - interrupts 71 - interrupts
81 - "#dma-cells" 72 - "#dma-cells"
82 - iommus 73 - iommus
83 - dma-channels 74 - dma-channels
84 - dma-channel-mask 75 - dma-channel-mask
85 76
86 additionalProperties: false 77 additionalProperties: false
87 78
88 examples: 79 examples:
89 - | 80 - |
90 #include <dt-bindings/interrupt-controller 81 #include <dt-bindings/interrupt-controller/arm-gic.h>
91 #include <dt-bindings/dma/qcom-gpi.h> 82 #include <dt-bindings/dma/qcom-gpi.h>
92 gpi_dma0: dma-controller@800000 { 83 gpi_dma0: dma-controller@800000 {
93 compatible = "qcom,sdm845-gpi-dma"; 84 compatible = "qcom,sdm845-gpi-dma";
94 #dma-cells = <3>; 85 #dma-cells = <3>;
95 reg = <0x00800000 0x60000>; 86 reg = <0x00800000 0x60000>;
96 iommus = <&apps_smmu 0x0016 0x0>; 87 iommus = <&apps_smmu 0x0016 0x0>;
97 dma-channels = <13>; 88 dma-channels = <13>;
98 dma-channel-mask = <0xfa>; 89 dma-channel-mask = <0xfa>;
99 interrupts = <GIC_SPI 244 IRQ_TYPE_LEV 90 interrupts = <GIC_SPI 244 IRQ_TYPE_LEVEL_HIGH>,
100 <GIC_SPI 245 IRQ_TYPE_LEV 91 <GIC_SPI 245 IRQ_TYPE_LEVEL_HIGH>,
101 <GIC_SPI 246 IRQ_TYPE_LEV 92 <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>,
102 <GIC_SPI 247 IRQ_TYPE_LEV 93 <GIC_SPI 247 IRQ_TYPE_LEVEL_HIGH>,
103 <GIC_SPI 248 IRQ_TYPE_LEV 94 <GIC_SPI 248 IRQ_TYPE_LEVEL_HIGH>,
104 <GIC_SPI 249 IRQ_TYPE_LEV 95 <GIC_SPI 249 IRQ_TYPE_LEVEL_HIGH>,
105 <GIC_SPI 250 IRQ_TYPE_LEV 96 <GIC_SPI 250 IRQ_TYPE_LEVEL_HIGH>,
106 <GIC_SPI 251 IRQ_TYPE_LEV 97 <GIC_SPI 251 IRQ_TYPE_LEVEL_HIGH>,
107 <GIC_SPI 252 IRQ_TYPE_LEV 98 <GIC_SPI 252 IRQ_TYPE_LEVEL_HIGH>,
108 <GIC_SPI 253 IRQ_TYPE_LEV 99 <GIC_SPI 253 IRQ_TYPE_LEVEL_HIGH>,
109 <GIC_SPI 254 IRQ_TYPE_LEV 100 <GIC_SPI 254 IRQ_TYPE_LEVEL_HIGH>,
110 <GIC_SPI 255 IRQ_TYPE_LEV 101 <GIC_SPI 255 IRQ_TYPE_LEVEL_HIGH>,
111 <GIC_SPI 256 IRQ_TYPE_LEV 102 <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>;
112 }; 103 };
113 104
114 ... 105 ...
Linux® is a registered trademark of Linus Torvalds in the United States and other countries.
TOMOYO® is a registered trademark of NTT DATA CORPORATION.