1 .. SPDX-License-Identifier: GPL-2.0 1 .. SPDX-License-Identifier: GPL-2.0
2 2
3 ===================================== 3 =====================================
4 Devicetree Sources (DTS) Coding Style 4 Devicetree Sources (DTS) Coding Style
5 ===================================== 5 =====================================
6 6
7 When writing Devicetree Sources (DTS) please o 7 When writing Devicetree Sources (DTS) please observe below guidelines. They
8 should be considered complementary to any rule 8 should be considered complementary to any rules expressed already in
9 the Devicetree Specification and the dtc compi 9 the Devicetree Specification and the dtc compiler (including W=1 and W=2
10 builds). 10 builds).
11 11
12 Individual architectures and subarchitectures 12 Individual architectures and subarchitectures can define additional rules,
13 making the coding style stricter. 13 making the coding style stricter.
14 14
15 Naming and Valid Characters 15 Naming and Valid Characters
16 --------------------------- 16 ---------------------------
17 17
18 The Devicetree Specification allows a broad ra 18 The Devicetree Specification allows a broad range of characters in node
19 and property names, but this coding style narr 19 and property names, but this coding style narrows the range down to achieve
20 better code readability. 20 better code readability.
21 21
22 1. Node and property names can use only the fo 22 1. Node and property names can use only the following characters:
23 23
24 * Lowercase characters: [a-z] 24 * Lowercase characters: [a-z]
25 * Digits: [0-9] 25 * Digits: [0-9]
26 * Dash: - 26 * Dash: -
27 27
28 2. Labels can use only the following character 28 2. Labels can use only the following characters:
29 29
30 * Lowercase characters: [a-z] 30 * Lowercase characters: [a-z]
31 * Digits: [0-9] 31 * Digits: [0-9]
32 * Underscore: _ 32 * Underscore: _
33 33
34 3. Unless a bus defines differently, unit addr 34 3. Unless a bus defines differently, unit addresses shall use lowercase
35 hexadecimal digits, without leading zeros ( 35 hexadecimal digits, without leading zeros (padding).
36 36
37 4. Hex values in properties, e.g. "reg", shall 37 4. Hex values in properties, e.g. "reg", shall use lowercase hex. The address
38 part can be padded with leading zeros. 38 part can be padded with leading zeros.
39 39
40 Example:: 40 Example::
41 41
42 gpi_dma2: dma-controller@a00000 { 42 gpi_dma2: dma-controller@a00000 {
43 compatible = "qcom,sm8550-gpi- 43 compatible = "qcom,sm8550-gpi-dma", "qcom,sm6350-gpi-dma";
44 reg = <0x0 0x00a00000 0x0 0x60 44 reg = <0x0 0x00a00000 0x0 0x60000>;
45 } 45 }
46 46
47 Order of Nodes 47 Order of Nodes
48 -------------- 48 --------------
49 49
50 1. Nodes on any bus, thus using unit addresses 50 1. Nodes on any bus, thus using unit addresses for children, shall be
51 ordered by unit address in ascending order. 51 ordered by unit address in ascending order.
52 Alternatively for some subarchitectures, no 52 Alternatively for some subarchitectures, nodes of the same type can be
53 grouped together, e.g. all I2C controllers 53 grouped together, e.g. all I2C controllers one after another even if this
54 breaks unit address ordering. 54 breaks unit address ordering.
55 55
56 2. Nodes without unit addresses shall be order 56 2. Nodes without unit addresses shall be ordered alpha-numerically by the node
57 name. For a few node types, they can be or 57 name. For a few node types, they can be ordered by the main property, e.g.
58 pin configuration states ordered by value o 58 pin configuration states ordered by value of "pins" property.
59 59
60 3. When extending nodes in the board DTS via & 60 3. When extending nodes in the board DTS via &label, the entries shall be
61 ordered either alpha-numerically or by keep 61 ordered either alpha-numerically or by keeping the order from DTSI, where
62 the choice depends on the subarchitecture. 62 the choice depends on the subarchitecture.
63 63
64 The above-described ordering rules are easy to 64 The above-described ordering rules are easy to enforce during review, reduce
65 chances of conflicts for simultaneous addition 65 chances of conflicts for simultaneous additions of new nodes to a file and help
66 in navigating through the DTS source. 66 in navigating through the DTS source.
67 67
68 Example:: 68 Example::
69 69
70 /* SoC DTSI */ 70 /* SoC DTSI */
71 71
72 / { 72 / {
73 cpus { 73 cpus {
74 /* ... */ 74 /* ... */
75 }; 75 };
76 76
77 psci { 77 psci {
78 /* ... */ 78 /* ... */
79 }; 79 };
80 80
81 soc@0 { 81 soc@0 {
82 dma: dma-controller@10 82 dma: dma-controller@10000 {
83 /* ... */ 83 /* ... */
84 }; 84 };
85 85
86 clk: clock-controller@ 86 clk: clock-controller@80000 {
87 /* ... */ 87 /* ... */
88 }; 88 };
89 }; 89 };
90 }; 90 };
91 91
92 /* Board DTS - alphabetical order */ 92 /* Board DTS - alphabetical order */
93 93
94 &clk { 94 &clk {
95 /* ... */ 95 /* ... */
96 }; 96 };
97 97
98 &dma { 98 &dma {
99 /* ... */ 99 /* ... */
100 }; 100 };
101 101
102 /* Board DTS - alternative order, keep 102 /* Board DTS - alternative order, keep as DTSI */
103 103
104 &dma { 104 &dma {
105 /* ... */ 105 /* ... */
106 }; 106 };
107 107
108 &clk { 108 &clk {
109 /* ... */ 109 /* ... */
110 }; 110 };
111 111
112 Order of Properties in Device Node 112 Order of Properties in Device Node
113 ---------------------------------- 113 ----------------------------------
114 114
115 The following order of properties in device no 115 The following order of properties in device nodes is preferred:
116 116
117 1. "compatible" 117 1. "compatible"
118 2. "reg" 118 2. "reg"
119 3. "ranges" 119 3. "ranges"
120 4. Standard/common properties (defined by comm 120 4. Standard/common properties (defined by common bindings, e.g. without
121 vendor-prefixes) 121 vendor-prefixes)
122 5. Vendor-specific properties 122 5. Vendor-specific properties
123 6. "status" (if applicable) 123 6. "status" (if applicable)
124 7. Child nodes, where each node is preceded wi 124 7. Child nodes, where each node is preceded with a blank line
125 125
126 The "status" property is by default "okay", th 126 The "status" property is by default "okay", thus it can be omitted.
127 127
128 The above-described ordering follows this appr 128 The above-described ordering follows this approach:
129 129
130 1. Most important properties start the node: c 130 1. Most important properties start the node: compatible then bus addressing to
131 match unit address. 131 match unit address.
132 2. Each node will have common properties in si 132 2. Each node will have common properties in similar place.
133 3. Status is the last information to annotate 133 3. Status is the last information to annotate that device node is or is not
134 finished (board resources are needed). 134 finished (board resources are needed).
135 135
136 Example:: 136 Example::
137 137
138 /* SoC DTSI */ 138 /* SoC DTSI */
139 139
140 device_node: device-class@6789abc { 140 device_node: device-class@6789abc {
141 compatible = "vendor,device"; 141 compatible = "vendor,device";
142 reg = <0x0 0x06789abc 0x0 0xa1 142 reg = <0x0 0x06789abc 0x0 0xa123>;
143 ranges = <0x0 0x0 0x06789abc 0 143 ranges = <0x0 0x0 0x06789abc 0x1000>;
144 #dma-cells = <1>; 144 #dma-cells = <1>;
145 clocks = <&clock_controller 0> 145 clocks = <&clock_controller 0>, <&clock_controller 1>;
146 clock-names = "bus", "host"; 146 clock-names = "bus", "host";
147 #address-cells = <1>; <<
148 #size-cells = <1>; <<
149 vendor,custom-property = <2>; 147 vendor,custom-property = <2>;
150 status = "disabled"; 148 status = "disabled";
151 149
152 child_node: child-class@100 { 150 child_node: child-class@100 {
153 reg = <0x100 0x200>; 151 reg = <0x100 0x200>;
154 /* ... */ 152 /* ... */
155 }; 153 };
156 }; 154 };
157 155
158 /* Board DTS */ 156 /* Board DTS */
159 157
160 &device_node { 158 &device_node {
161 vdd-supply = <&board_vreg1>; 159 vdd-supply = <&board_vreg1>;
162 status = "okay"; 160 status = "okay";
163 } 161 }
164 162
165 Indentation 163 Indentation
166 ----------- 164 -----------
167 165
168 1. Use indentation according to Documentation/ 166 1. Use indentation according to Documentation/process/coding-style.rst.
169 2. Each entry in arrays with multiple cells, e 167 2. Each entry in arrays with multiple cells, e.g. "reg" with two IO addresses,
170 shall be enclosed in <>. 168 shall be enclosed in <>.
171 3. For arrays spanning across lines, it is pre 169 3. For arrays spanning across lines, it is preferred to align the continued
172 entries with opening < from the first line. 170 entries with opening < from the first line.
173 171
174 Example:: 172 Example::
175 173
176 thermal-sensor@c271000 { 174 thermal-sensor@c271000 {
177 compatible = "qcom,sm8550-tsen 175 compatible = "qcom,sm8550-tsens", "qcom,tsens-v2";
178 reg = <0x0 0x0c271000 0x0 0x10 176 reg = <0x0 0x0c271000 0x0 0x1000>,
179 <0x0 0x0c222000 0x0 0x10 177 <0x0 0x0c222000 0x0 0x1000>;
180 }; 178 };
181 179
182 Organizing DTSI and DTS 180 Organizing DTSI and DTS
183 ----------------------- 181 -----------------------
184 182
185 The DTSI and DTS files shall be organized in a 183 The DTSI and DTS files shall be organized in a way representing the common,
186 reusable parts of hardware. Typically, this m 184 reusable parts of hardware. Typically, this means organizing DTSI and DTS files
187 into several files: 185 into several files:
188 186
189 1. DTSI with contents of the entire SoC, witho 187 1. DTSI with contents of the entire SoC, without nodes for hardware not present
190 on the SoC. 188 on the SoC.
191 2. If applicable: DTSI with common or re-usabl 189 2. If applicable: DTSI with common or re-usable parts of the hardware, e.g.
192 entire System-on-Module. 190 entire System-on-Module.
193 3. DTS representing the board. 191 3. DTS representing the board.
194 192
195 Hardware components that are present on the bo 193 Hardware components that are present on the board shall be placed in the
196 board DTS, not in the SoC or SoM DTSI. A part 194 board DTS, not in the SoC or SoM DTSI. A partial exception is a common
197 external reference SoC input clock, which coul 195 external reference SoC input clock, which could be coded as a fixed-clock in
198 the SoC DTSI with its frequency provided by ea 196 the SoC DTSI with its frequency provided by each board DTS.
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