1 # SPDX-License-Identifier: GPL-2.0 1 # SPDX-License-Identifier: GPL-2.0
2 %YAML 1.2 2 %YAML 1.2
3 --- 3 ---
4 $id: http://devicetree.org/schemas/gnss/sirfst 4 $id: http://devicetree.org/schemas/gnss/sirfstar.yaml#
5 $schema: http://devicetree.org/meta-schemas/co 5 $schema: http://devicetree.org/meta-schemas/core.yaml#
6 6
7 title: SiRFstar GNSS Receiver 7 title: SiRFstar GNSS Receiver
8 8
9 maintainers: 9 maintainers:
10 - Johan Hovold <johan@kernel.org> 10 - Johan Hovold <johan@kernel.org>
11 11
12 description: 12 description:
13 The SiRFstar GNSS receivers have incarnated 13 The SiRFstar GNSS receivers have incarnated over the years in different
14 chips, starting from the SiRFstarIII which w 14 chips, starting from the SiRFstarIII which was a chip that was introduced in
15 2004 and used in a lot of dedicated GPS devi 15 2004 and used in a lot of dedicated GPS devices. In 2009 SiRF was acquired
16 by CSR (Cambridge Silicon Radio) and in 2012 16 by CSR (Cambridge Silicon Radio) and in 2012 the CSR GPS business was
17 acquired by Samsung, while some products rem 17 acquired by Samsung, while some products remained with CSR. In 2014 CSR
18 was acquired by Qualcomm who still sell some 18 was acquired by Qualcomm who still sell some of the SiRF products.
19 19
20 SiRF chips can be used over UART, I2C or SPI 20 SiRF chips can be used over UART, I2C or SPI buses.
21 21
22 allOf: 22 allOf:
23 - $ref: gnss-common.yaml# 23 - $ref: gnss-common.yaml#
24 - $ref: /schemas/serial/serial-peripheral-pr 24 - $ref: /schemas/serial/serial-peripheral-props.yaml#
25 25
26 properties: 26 properties:
27 compatible: 27 compatible:
28 enum: 28 enum:
29 - csr,gsd4t 29 - csr,gsd4t
30 - csr,csrg05ta03-icje-r 30 - csr,csrg05ta03-icje-r
31 - fastrax,uc430 31 - fastrax,uc430
32 - linx,r4 32 - linx,r4
33 - wi2wi,w2sg0004 33 - wi2wi,w2sg0004
34 - wi2wi,w2sg0008i 34 - wi2wi,w2sg0008i
35 - wi2wi,w2sg0084i 35 - wi2wi,w2sg0084i
36 36
37 reg: 37 reg:
38 description: 38 description:
39 The I2C Address, SPI chip select address 39 The I2C Address, SPI chip select address. Not required on UART buses.
40 40
41 vcc-supply: 41 vcc-supply:
42 description: 42 description:
43 Main voltage regulator, pin names such a 43 Main voltage regulator, pin names such as 3V3_IN, VCC, VDD.
44 44
45 reset-gpios: 45 reset-gpios:
46 maxItems: 1 46 maxItems: 1
47 description: An optional active low reset 47 description: An optional active low reset line, should be flagged with
48 GPIO_ACTIVE_LOW. 48 GPIO_ACTIVE_LOW.
49 49
50 sirf,onoff-gpios: 50 sirf,onoff-gpios:
51 maxItems: 1 51 maxItems: 1
52 description: GPIO used to power on and off 52 description: GPIO used to power on and off device, pin name ON_OFF.
53 53
54 sirf,wakeup-gpios: 54 sirf,wakeup-gpios:
55 maxItems: 1 55 maxItems: 1
56 description: GPIO used to determine device 56 description: GPIO used to determine device power state, pin names such
57 as RFPWRUP, WAKEUP. 57 as RFPWRUP, WAKEUP.
58 58
59 required: 59 required:
60 - compatible 60 - compatible
61 - vcc-supply 61 - vcc-supply
62 62
63 unevaluatedProperties: false 63 unevaluatedProperties: false
64 64
65 examples: 65 examples:
66 - | 66 - |
67 #include <dt-bindings/gpio/gpio.h> 67 #include <dt-bindings/gpio/gpio.h>
68 serial { 68 serial {
69 gnss { 69 gnss {
70 compatible = "wi2wi,w2sg0084i"; 70 compatible = "wi2wi,w2sg0084i";
71 vcc-supply = <&gnss_vcc_reg>; 71 vcc-supply = <&gnss_vcc_reg>;
72 reset-gpios = <&gpio0 15 GPIO_ACTI 72 reset-gpios = <&gpio0 15 GPIO_ACTIVE_LOW>;
73 sirf,onoff-gpios = <&gpio0 16 GPIO 73 sirf,onoff-gpios = <&gpio0 16 GPIO_ACTIVE_HIGH>;
74 sirf,wakeup-gpios = <&gpio0 17 GPI 74 sirf,wakeup-gpios = <&gpio0 17 GPIO_ACTIVE_HIGH>;
75 current-speed = <38400>; 75 current-speed = <38400>;
76 }; 76 };
77 }; 77 };
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