1 # SPDX-License-Identifier: (GPL-2.0-only OR BS 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2 %YAML 1.2 2 %YAML 1.2
3 --- 3 ---
4 $id: http://devicetree.org/schemas/gpio/aspeed 4 $id: http://devicetree.org/schemas/gpio/aspeed,sgpio.yaml#
5 $schema: http://devicetree.org/meta-schemas/co 5 $schema: http://devicetree.org/meta-schemas/core.yaml#
6 6
7 title: Aspeed SGPIO controller 7 title: Aspeed SGPIO controller
8 8
9 maintainers: 9 maintainers:
10 - Andrew Jeffery <andrew@aj.id.au> 10 - Andrew Jeffery <andrew@aj.id.au>
11 11
12 description: 12 description:
13 This SGPIO controller is for ASPEED AST2400, 13 This SGPIO controller is for ASPEED AST2400, AST2500 and AST2600 SoC,
14 AST2600 have two sgpio master one with 128 p 14 AST2600 have two sgpio master one with 128 pins another one with 80 pins,
15 AST2500/AST2400 have one sgpio master with 8 15 AST2500/AST2400 have one sgpio master with 80 pins. Each of the Serial
16 GPIO pins can be programmed to support the f 16 GPIO pins can be programmed to support the following options
17 - Support interrupt option for each input po 17 - Support interrupt option for each input port and various interrupt
18 sensitivity option (level-high, level-low, 18 sensitivity option (level-high, level-low, edge-high, edge-low)
19 - Support reset tolerance option for each ou 19 - Support reset tolerance option for each output port
20 - Directly connected to APB bus and its shif 20 - Directly connected to APB bus and its shift clock is from APB bus clock
21 divided by a programmable value. 21 divided by a programmable value.
22 - Co-work with external signal-chained TTL c 22 - Co-work with external signal-chained TTL components (74LV165/74LV595)
23 23
24 properties: 24 properties:
25 compatible: 25 compatible:
26 enum: 26 enum:
27 - aspeed,ast2400-sgpio 27 - aspeed,ast2400-sgpio
28 - aspeed,ast2500-sgpio 28 - aspeed,ast2500-sgpio
29 - aspeed,ast2600-sgpiom 29 - aspeed,ast2600-sgpiom
30 30
31 reg: 31 reg:
32 maxItems: 1 32 maxItems: 1
33 33
34 gpio-controller: true 34 gpio-controller: true
35 35
36 # Each SGPIO is represented as a pair of inp <<
37 gpio-line-names: <<
38 minItems: 160 <<
39 maxItems: 256 <<
40 <<
41 '#gpio-cells': 36 '#gpio-cells':
42 const: 2 37 const: 2
43 38
44 interrupts: 39 interrupts:
45 maxItems: 1 40 maxItems: 1
46 41
47 interrupt-controller: true 42 interrupt-controller: true
48 43
49 '#interrupt-cells': <<
50 const: 2 <<
51 <<
52 clocks: 44 clocks:
53 maxItems: 1 45 maxItems: 1
54 46
55 ngpios: true 47 ngpios: true
56 48
57 bus-frequency: true 49 bus-frequency: true
58 50
59 required: 51 required:
60 - compatible 52 - compatible
61 - reg 53 - reg
62 - gpio-controller 54 - gpio-controller
63 - '#gpio-cells' 55 - '#gpio-cells'
64 - interrupts 56 - interrupts
65 - interrupt-controller 57 - interrupt-controller
66 - '#interrupt-cells' <<
67 - ngpios 58 - ngpios
68 - clocks 59 - clocks
69 - bus-frequency 60 - bus-frequency
70 61
71 additionalProperties: false 62 additionalProperties: false
72 63
73 examples: 64 examples:
74 - | 65 - |
75 #include <dt-bindings/clock/aspeed-clock.h 66 #include <dt-bindings/clock/aspeed-clock.h>
76 sgpio: sgpio@1e780200 { 67 sgpio: sgpio@1e780200 {
77 #gpio-cells = <2>; 68 #gpio-cells = <2>;
78 compatible = "aspeed,ast2500-sgpio"; 69 compatible = "aspeed,ast2500-sgpio";
79 gpio-controller; 70 gpio-controller;
80 interrupts = <40>; 71 interrupts = <40>;
81 reg = <0x1e780200 0x0100>; 72 reg = <0x1e780200 0x0100>;
82 clocks = <&syscon ASPEED_CLK_APB>; 73 clocks = <&syscon ASPEED_CLK_APB>;
83 interrupt-controller; 74 interrupt-controller;
84 #interrupt-cells = <2>; <<
85 ngpios = <80>; 75 ngpios = <80>;
86 bus-frequency = <12000000>; 76 bus-frequency = <12000000>;
87 }; 77 };
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