1 APM X-Gene Standby GPIO controller bindings 1 APM X-Gene Standby GPIO controller bindings
2 2
3 This is a gpio controller in the standby domai 3 This is a gpio controller in the standby domain. It also supports interrupt in
4 some particular pins which are sourced to its 4 some particular pins which are sourced to its parent interrupt controller
5 as diagram below: 5 as diagram below:
6 +----------------- 6 +-----------------+
7 | X-Gene standby 7 | X-Gene standby |
8 | GPIO controller 8 | GPIO controller +------ GPIO_0
9 +------------+ | 9 +------------+ | | ...
10 | Parent IRQ | EXT_INT_0 | 10 | Parent IRQ | EXT_INT_0 | +------ GPIO_8/EXT_INT_0
11 | controller | (SPI40) | 11 | controller | (SPI40) | | ...
12 | (GICv2) +--------------+ 12 | (GICv2) +--------------+ +------ GPIO_[N+8]/EXT_INT_N
13 | | ... | 13 | | ... | |
14 | | EXT_INT_N | 14 | | EXT_INT_N | +------ GPIO_[N+9]
15 | | (SPI[40 + N])| 15 | | (SPI[40 + N])| | ...
16 | +--------------+ 16 | +--------------+ +------ GPIO_MAX
17 +------------+ +----------------- 17 +------------+ +-----------------+
18 18
19 Required properties: 19 Required properties:
20 - compatible: "apm,xgene-gpio-sb" for the X-Ge 20 - compatible: "apm,xgene-gpio-sb" for the X-Gene Standby GPIO controller
21 - reg: Physical base address and size of the c 21 - reg: Physical base address and size of the controller's registers
22 - #gpio-cells: Should be two. 22 - #gpio-cells: Should be two.
23 - first cell is the pin number 23 - first cell is the pin number
24 - second cell is used to specify the g 24 - second cell is used to specify the gpio polarity:
25 0 = active high 25 0 = active high
26 1 = active low 26 1 = active low
27 - gpio-controller: Marks the device node as a 27 - gpio-controller: Marks the device node as a GPIO controller.
28 - interrupts: The EXT_INT_0 parent interrupt r 28 - interrupts: The EXT_INT_0 parent interrupt resource must be listed first.
29 - interrupt-cells: Should be two. 29 - interrupt-cells: Should be two.
30 - first cell is 0-N corresponding for E 30 - first cell is 0-N corresponding for EXT_INT_0 to EXT_INT_N.
31 - second cell is used to specify flags. 31 - second cell is used to specify flags.
32 - interrupt-controller: Marks the device node 32 - interrupt-controller: Marks the device node as an interrupt controller.
33 - apm,nr-gpios: Optional, specify number of gp 33 - apm,nr-gpios: Optional, specify number of gpios pin.
34 - apm,nr-irqs: Optional, specify number of int 34 - apm,nr-irqs: Optional, specify number of interrupt pins.
35 - apm,irq-start: Optional, specify lowest gpio 35 - apm,irq-start: Optional, specify lowest gpio pin support interrupt.
36 36
37 Example: 37 Example:
38 sbgpio: gpio@17001000{ 38 sbgpio: gpio@17001000{
39 compatible = "apm,xgene-gpio-s 39 compatible = "apm,xgene-gpio-sb";
40 reg = <0x0 0x17001000 0x0 0x40 40 reg = <0x0 0x17001000 0x0 0x400>;
41 #gpio-cells = <2>; 41 #gpio-cells = <2>;
42 gpio-controller; 42 gpio-controller;
43 interrupts = <0x0 0x28 0x1> 43 interrupts = <0x0 0x28 0x1>,
44 <0x0 0x29 0x1> 44 <0x0 0x29 0x1>,
45 <0x0 0x2a 0x1> 45 <0x0 0x2a 0x1>,
46 <0x0 0x2b 0x1> 46 <0x0 0x2b 0x1>,
47 <0x0 0x2c 0x1> 47 <0x0 0x2c 0x1>,
48 <0x0 0x2d 0x1> 48 <0x0 0x2d 0x1>;
49 interrupt-parent = <&gic>; 49 interrupt-parent = <&gic>;
50 #interrupt-cells = <2>; 50 #interrupt-cells = <2>;
51 interrupt-controller; 51 interrupt-controller;
52 apm,nr-gpios = <22>; 52 apm,nr-gpios = <22>;
53 apm,nr-irqs = <6>; 53 apm,nr-irqs = <6>;
54 apm,irq-start = <8>; 54 apm,irq-start = <8>;
55 }; 55 };
56 56
57 testuser { 57 testuser {
58 compatible = "example,testuser 58 compatible = "example,testuser";
59 /* Use the GPIO_13/EXT_INT_5 l 59 /* Use the GPIO_13/EXT_INT_5 line as an active high triggered
60 * level interrupt 60 * level interrupt
61 */ 61 */
62 interrupts = <5 4>; 62 interrupts = <5 4>;
63 interrupt-parent = <&sbgpio>; 63 interrupt-parent = <&sbgpio>;
64 }; 64 };
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