1 # SPDX-License-Identifier: GPL-2.0 1 # SPDX-License-Identifier: GPL-2.0 2 %YAML 1.2 2 %YAML 1.2 3 --- 3 --- 4 $id: http://devicetree.org/schemas/gpio/rockch 4 $id: http://devicetree.org/schemas/gpio/rockchip,gpio-bank.yaml# 5 $schema: http://devicetree.org/meta-schemas/co 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 6 6 7 title: Rockchip GPIO bank 7 title: Rockchip GPIO bank 8 8 9 maintainers: 9 maintainers: 10 - Heiko Stuebner <heiko@sntech.de> 10 - Heiko Stuebner <heiko@sntech.de> 11 11 12 properties: 12 properties: 13 compatible: 13 compatible: 14 enum: 14 enum: 15 - rockchip,gpio-bank 15 - rockchip,gpio-bank 16 - rockchip,rk3188-gpio-bank0 16 - rockchip,rk3188-gpio-bank0 17 17 18 reg: 18 reg: 19 maxItems: 1 19 maxItems: 1 20 20 21 interrupts: 21 interrupts: 22 maxItems: 1 22 maxItems: 1 23 23 24 clocks: 24 clocks: 25 minItems: 1 !! 25 maxItems: 1 26 items: << 27 - description: APB interface clock sourc << 28 - description: GPIO debounce reference c << 29 << 30 gpio-ranges: true << 31 26 32 gpio-controller: true 27 gpio-controller: true 33 28 34 gpio-line-names: true << 35 << 36 "#gpio-cells": 29 "#gpio-cells": 37 const: 2 30 const: 2 38 31 39 interrupt-controller: true 32 interrupt-controller: true 40 33 41 "#interrupt-cells": 34 "#interrupt-cells": 42 const: 2 35 const: 2 43 << 44 patternProperties: << 45 "^.+-hog(-[0-9]+)?$": << 46 type: object << 47 << 48 required: << 49 - gpio-hog << 50 36 51 required: 37 required: 52 - compatible 38 - compatible 53 - reg 39 - reg 54 - interrupts 40 - interrupts 55 - clocks 41 - clocks 56 - gpio-controller 42 - gpio-controller 57 - "#gpio-cells" 43 - "#gpio-cells" 58 - interrupt-controller 44 - interrupt-controller 59 - "#interrupt-cells" 45 - "#interrupt-cells" 60 46 61 additionalProperties: false 47 additionalProperties: false 62 48 63 examples: 49 examples: 64 - | 50 - | 65 #include <dt-bindings/interrupt-controller 51 #include <dt-bindings/interrupt-controller/arm-gic.h> 66 pinctrl: pinctrl { 52 pinctrl: pinctrl { 67 #address-cells = <1>; 53 #address-cells = <1>; 68 #size-cells = <1>; 54 #size-cells = <1>; 69 ranges; 55 ranges; 70 56 71 gpio0: gpio@2000a000 { 57 gpio0: gpio@2000a000 { 72 compatible = "rockchip,rk3188-gpio-ban 58 compatible = "rockchip,rk3188-gpio-bank0"; 73 reg = <0x2000a000 0x100>; 59 reg = <0x2000a000 0x100>; 74 interrupts = <GIC_SPI 54 IRQ_TYPE_LEVE 60 interrupts = <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>; 75 clocks = <&clk_gates8 9>; 61 clocks = <&clk_gates8 9>; 76 62 77 gpio-controller; 63 gpio-controller; 78 #gpio-cells = <2>; 64 #gpio-cells = <2>; 79 65 80 interrupt-controller; 66 interrupt-controller; 81 #interrupt-cells = <2>; 67 #interrupt-cells = <2>; 82 }; 68 }; 83 69 84 gpio1: gpio@2003c000 { 70 gpio1: gpio@2003c000 { 85 compatible = "rockchip,gpio-bank"; 71 compatible = "rockchip,gpio-bank"; 86 reg = <0x2003c000 0x100>; 72 reg = <0x2003c000 0x100>; 87 interrupts = <GIC_SPI 55 IRQ_TYPE_LEVE 73 interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>; 88 clocks = <&clk_gates8 10>; 74 clocks = <&clk_gates8 10>; 89 75 90 gpio-controller; 76 gpio-controller; 91 #gpio-cells = <2>; 77 #gpio-cells = <2>; 92 78 93 interrupt-controller; 79 interrupt-controller; 94 #interrupt-cells = <2>; 80 #interrupt-cells = <2>; 95 }; 81 }; 96 }; 82 };
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