1 # SPDX-License-Identifier: GPL-2.0 1 # SPDX-License-Identifier: GPL-2.0
2 %YAML 1.2 2 %YAML 1.2
3 --- 3 ---
4 $id: http://devicetree.org/schemas/gpio/rockch 4 $id: http://devicetree.org/schemas/gpio/rockchip,gpio-bank.yaml#
5 $schema: http://devicetree.org/meta-schemas/co 5 $schema: http://devicetree.org/meta-schemas/core.yaml#
6 6
7 title: Rockchip GPIO bank 7 title: Rockchip GPIO bank
8 8
9 maintainers: 9 maintainers:
10 - Heiko Stuebner <heiko@sntech.de> 10 - Heiko Stuebner <heiko@sntech.de>
11 11
12 properties: 12 properties:
13 compatible: 13 compatible:
14 enum: 14 enum:
15 - rockchip,gpio-bank 15 - rockchip,gpio-bank
16 - rockchip,rk3188-gpio-bank0 16 - rockchip,rk3188-gpio-bank0
17 17
18 reg: 18 reg:
19 maxItems: 1 19 maxItems: 1
20 20
21 interrupts: 21 interrupts:
22 maxItems: 1 22 maxItems: 1
23 23
24 clocks: 24 clocks:
25 minItems: 1 25 minItems: 1
26 items: 26 items:
27 - description: APB interface clock sourc 27 - description: APB interface clock source
28 - description: GPIO debounce reference c 28 - description: GPIO debounce reference clock source
29 29
30 gpio-ranges: true <<
31 <<
32 gpio-controller: true 30 gpio-controller: true
33 31
34 gpio-line-names: true 32 gpio-line-names: true
35 33
36 "#gpio-cells": 34 "#gpio-cells":
37 const: 2 35 const: 2
38 36
39 interrupt-controller: true 37 interrupt-controller: true
40 38
41 "#interrupt-cells": 39 "#interrupt-cells":
42 const: 2 40 const: 2
43 <<
44 patternProperties: <<
45 "^.+-hog(-[0-9]+)?$": <<
46 type: object <<
47 <<
48 required: <<
49 - gpio-hog <<
50 41
51 required: 42 required:
52 - compatible 43 - compatible
53 - reg 44 - reg
54 - interrupts 45 - interrupts
55 - clocks 46 - clocks
56 - gpio-controller 47 - gpio-controller
57 - "#gpio-cells" 48 - "#gpio-cells"
58 - interrupt-controller 49 - interrupt-controller
59 - "#interrupt-cells" 50 - "#interrupt-cells"
60 51
61 additionalProperties: false 52 additionalProperties: false
62 53
63 examples: 54 examples:
64 - | 55 - |
65 #include <dt-bindings/interrupt-controller 56 #include <dt-bindings/interrupt-controller/arm-gic.h>
66 pinctrl: pinctrl { 57 pinctrl: pinctrl {
67 #address-cells = <1>; 58 #address-cells = <1>;
68 #size-cells = <1>; 59 #size-cells = <1>;
69 ranges; 60 ranges;
70 61
71 gpio0: gpio@2000a000 { 62 gpio0: gpio@2000a000 {
72 compatible = "rockchip,rk3188-gpio-ban 63 compatible = "rockchip,rk3188-gpio-bank0";
73 reg = <0x2000a000 0x100>; 64 reg = <0x2000a000 0x100>;
74 interrupts = <GIC_SPI 54 IRQ_TYPE_LEVE 65 interrupts = <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>;
75 clocks = <&clk_gates8 9>; 66 clocks = <&clk_gates8 9>;
76 67
77 gpio-controller; 68 gpio-controller;
78 #gpio-cells = <2>; 69 #gpio-cells = <2>;
79 70
80 interrupt-controller; 71 interrupt-controller;
81 #interrupt-cells = <2>; 72 #interrupt-cells = <2>;
82 }; 73 };
83 74
84 gpio1: gpio@2003c000 { 75 gpio1: gpio@2003c000 {
85 compatible = "rockchip,gpio-bank"; 76 compatible = "rockchip,gpio-bank";
86 reg = <0x2003c000 0x100>; 77 reg = <0x2003c000 0x100>;
87 interrupts = <GIC_SPI 55 IRQ_TYPE_LEVE 78 interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>;
88 clocks = <&clk_gates8 10>; 79 clocks = <&clk_gates8 10>;
89 80
90 gpio-controller; 81 gpio-controller;
91 #gpio-cells = <2>; 82 #gpio-cells = <2>;
92 83
93 interrupt-controller; 84 interrupt-controller;
94 #interrupt-cells = <2>; 85 #interrupt-cells = <2>;
95 }; 86 };
96 }; 87 };
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