1 # SPDX-License-Identifier: GPL-2.0 1 # SPDX-License-Identifier: GPL-2.0
2 %YAML 1.2 2 %YAML 1.2
3 --- 3 ---
4 $id: http://devicetree.org/schemas/gpio/rockch 4 $id: http://devicetree.org/schemas/gpio/rockchip,gpio-bank.yaml#
5 $schema: http://devicetree.org/meta-schemas/co 5 $schema: http://devicetree.org/meta-schemas/core.yaml#
6 6
7 title: Rockchip GPIO bank 7 title: Rockchip GPIO bank
8 8
9 maintainers: 9 maintainers:
10 - Heiko Stuebner <heiko@sntech.de> 10 - Heiko Stuebner <heiko@sntech.de>
11 11
12 properties: 12 properties:
13 compatible: 13 compatible:
14 enum: 14 enum:
15 - rockchip,gpio-bank 15 - rockchip,gpio-bank
16 - rockchip,rk3188-gpio-bank0 16 - rockchip,rk3188-gpio-bank0
17 17
18 reg: 18 reg:
19 maxItems: 1 19 maxItems: 1
20 20
21 interrupts: 21 interrupts:
22 maxItems: 1 22 maxItems: 1
23 23
24 clocks: 24 clocks:
25 minItems: 1 25 minItems: 1
26 items: 26 items:
27 - description: APB interface clock sourc 27 - description: APB interface clock source
28 - description: GPIO debounce reference c 28 - description: GPIO debounce reference clock source
29 29
30 gpio-ranges: true 30 gpio-ranges: true
31 31
32 gpio-controller: true 32 gpio-controller: true
33 33
34 gpio-line-names: true 34 gpio-line-names: true
35 35
36 "#gpio-cells": 36 "#gpio-cells":
37 const: 2 37 const: 2
38 38
39 interrupt-controller: true 39 interrupt-controller: true
40 40
41 "#interrupt-cells": 41 "#interrupt-cells":
42 const: 2 42 const: 2
43 43
44 patternProperties: <<
45 "^.+-hog(-[0-9]+)?$": <<
46 type: object <<
47 <<
48 required: <<
49 - gpio-hog <<
50 <<
51 required: 44 required:
52 - compatible 45 - compatible
53 - reg 46 - reg
54 - interrupts 47 - interrupts
55 - clocks 48 - clocks
56 - gpio-controller 49 - gpio-controller
57 - "#gpio-cells" 50 - "#gpio-cells"
58 - interrupt-controller 51 - interrupt-controller
59 - "#interrupt-cells" 52 - "#interrupt-cells"
60 53
61 additionalProperties: false 54 additionalProperties: false
62 55
63 examples: 56 examples:
64 - | 57 - |
65 #include <dt-bindings/interrupt-controller 58 #include <dt-bindings/interrupt-controller/arm-gic.h>
66 pinctrl: pinctrl { 59 pinctrl: pinctrl {
67 #address-cells = <1>; 60 #address-cells = <1>;
68 #size-cells = <1>; 61 #size-cells = <1>;
69 ranges; 62 ranges;
70 63
71 gpio0: gpio@2000a000 { 64 gpio0: gpio@2000a000 {
72 compatible = "rockchip,rk3188-gpio-ban 65 compatible = "rockchip,rk3188-gpio-bank0";
73 reg = <0x2000a000 0x100>; 66 reg = <0x2000a000 0x100>;
74 interrupts = <GIC_SPI 54 IRQ_TYPE_LEVE 67 interrupts = <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>;
75 clocks = <&clk_gates8 9>; 68 clocks = <&clk_gates8 9>;
76 69
77 gpio-controller; 70 gpio-controller;
78 #gpio-cells = <2>; 71 #gpio-cells = <2>;
79 72
80 interrupt-controller; 73 interrupt-controller;
81 #interrupt-cells = <2>; 74 #interrupt-cells = <2>;
82 }; 75 };
83 76
84 gpio1: gpio@2003c000 { 77 gpio1: gpio@2003c000 {
85 compatible = "rockchip,gpio-bank"; 78 compatible = "rockchip,gpio-bank";
86 reg = <0x2003c000 0x100>; 79 reg = <0x2003c000 0x100>;
87 interrupts = <GIC_SPI 55 IRQ_TYPE_LEVE 80 interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>;
88 clocks = <&clk_gates8 10>; 81 clocks = <&clk_gates8 10>;
89 82
90 gpio-controller; 83 gpio-controller;
91 #gpio-cells = <2>; 84 #gpio-cells = <2>;
92 85
93 interrupt-controller; 86 interrupt-controller;
94 #interrupt-cells = <2>; 87 #interrupt-cells = <2>;
95 }; 88 };
96 }; 89 };
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