1 # SPDX-License-Identifier: (GPL-2.0-only OR BS 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2 %YAML 1.2 2 %YAML 1.2
3 --- 3 ---
4 $id: http://devicetree.org/schemas/gpio/xlnx,z 4 $id: http://devicetree.org/schemas/gpio/xlnx,zynqmp-gpio-modepin.yaml#
5 $schema: http://devicetree.org/meta-schemas/co 5 $schema: http://devicetree.org/meta-schemas/core.yaml#
6 6
7 title: ZynqMP Mode Pin GPIO controller 7 title: ZynqMP Mode Pin GPIO controller
8 8
9 description: 9 description:
10 PS_MODE is 4-bits boot mode pins sampled on 10 PS_MODE is 4-bits boot mode pins sampled on POR deassertion. Mode Pin
11 GPIO controller with configurable from numbe 11 GPIO controller with configurable from numbers of pins (from 0 to 3 per
12 PS_MODE). Every pin can be configured as inp 12 PS_MODE). Every pin can be configured as input/output.
13 13
14 maintainers: 14 maintainers:
15 - Mubin Sayyed <mubin.sayyed@amd.com> 15 - Mubin Sayyed <mubin.sayyed@amd.com>
16 - Radhey Shyam Pandey <radhey.shyam.pandey@am 16 - Radhey Shyam Pandey <radhey.shyam.pandey@amd.com>
17 17
18 properties: 18 properties:
19 compatible: 19 compatible:
20 const: xlnx,zynqmp-gpio-modepin 20 const: xlnx,zynqmp-gpio-modepin
21 21
22 gpio-controller: true 22 gpio-controller: true
23 23
24 "#gpio-cells": 24 "#gpio-cells":
25 const: 2 25 const: 2
26 26
27 label: true 27 label: true
28 28
29 required: 29 required:
30 - compatible 30 - compatible
31 - gpio-controller 31 - gpio-controller
32 - "#gpio-cells" 32 - "#gpio-cells"
33 33
34 additionalProperties: false 34 additionalProperties: false
35 35
36 examples: 36 examples:
37 - | 37 - |
38 zynqmp-firmware { 38 zynqmp-firmware {
39 gpio { 39 gpio {
40 compatible = "xlnx,zynqmp-gpio-mod 40 compatible = "xlnx,zynqmp-gpio-modepin";
41 gpio-controller; 41 gpio-controller;
42 #gpio-cells = <2>; 42 #gpio-cells = <2>;
43 label = "modepin"; 43 label = "modepin";
44 }; 44 };
45 }; 45 };
46 46
47 ... 47 ...
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