1 # SPDX-License-Identifier: GPL-2.0-only 1 # SPDX-License-Identifier: GPL-2.0-only 2 %YAML 1.2 2 %YAML 1.2 3 --- 3 --- 4 $id: http://devicetree.org/schemas/gpu/arm,mal 4 $id: http://devicetree.org/schemas/gpu/arm,mali-bifrost.yaml# 5 $schema: http://devicetree.org/meta-schemas/co 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 6 6 7 title: ARM Mali Bifrost GPU 7 title: ARM Mali Bifrost GPU 8 8 9 maintainers: 9 maintainers: 10 - Rob Herring <robh@kernel.org> 10 - Rob Herring <robh@kernel.org> 11 11 12 properties: 12 properties: 13 $nodename: 13 $nodename: 14 pattern: '^gpu@[a-f0-9]+$' 14 pattern: '^gpu@[a-f0-9]+$' 15 15 16 compatible: 16 compatible: 17 oneOf: !! 17 items: 18 - items: !! 18 - enum: 19 - enum: !! 19 - amlogic,meson-g12a-mali 20 - amlogic,meson-g12a-mali !! 20 - realtek,rtd1619-mali 21 - mediatek,mt8183-mali !! 21 - rockchip,px30-mali 22 - mediatek,mt8183b-mali !! 22 - const: arm,mali-bifrost # Mali Bifrost GPU model/revision is fully discoverable 23 - mediatek,mt8186-mali << 24 - realtek,rtd1619-mali << 25 - renesas,r9a07g044-mali << 26 - renesas,r9a07g054-mali << 27 - rockchip,px30-mali << 28 - rockchip,rk3568-mali << 29 - const: arm,mali-bifrost # Mali Bif << 30 - items: << 31 - enum: << 32 - mediatek,mt8195-mali << 33 - const: mediatek,mt8192-mali << 34 - const: arm,mali-valhall-jm # Mali << 35 - items: << 36 - enum: << 37 - mediatek,mt8188-mali << 38 - mediatek,mt8192-mali << 39 - const: arm,mali-valhall-jm # Mali << 40 23 41 reg: 24 reg: 42 maxItems: 1 25 maxItems: 1 43 26 44 interrupts: 27 interrupts: 45 minItems: 3 << 46 items: 28 items: 47 - description: Job interrupt 29 - description: Job interrupt 48 - description: MMU interrupt 30 - description: MMU interrupt 49 - description: GPU interrupt 31 - description: GPU interrupt 50 - description: Event interrupt << 51 32 52 interrupt-names: 33 interrupt-names: 53 minItems: 3 << 54 items: 34 items: 55 - const: job 35 - const: job 56 - const: mmu 36 - const: mmu 57 - const: gpu 37 - const: gpu 58 - const: event << 59 38 60 clocks: 39 clocks: 61 minItems: 1 !! 40 maxItems: 1 62 maxItems: 3 << 63 << 64 clock-names: true << 65 41 66 mali-supply: true 42 mali-supply: true 67 43 68 sram-supply: true << 69 << 70 operating-points-v2: true 44 operating-points-v2: true 71 45 72 power-domains: 46 power-domains: 73 minItems: 1 !! 47 maxItems: 1 74 maxItems: 5 << 75 << 76 power-domain-names: << 77 minItems: 2 << 78 maxItems: 5 << 79 48 80 resets: 49 resets: 81 minItems: 1 !! 50 maxItems: 2 82 maxItems: 3 << 83 << 84 reset-names: true << 85 51 86 "#cooling-cells": 52 "#cooling-cells": 87 const: 2 53 const: 2 88 54 89 dynamic-power-coefficient: 55 dynamic-power-coefficient: 90 $ref: /schemas/types.yaml#/definitions/uin !! 56 $ref: '/schemas/types.yaml#/definitions/uint32' 91 description: 57 description: 92 A u32 value that represents the running 58 A u32 value that represents the running time dynamic 93 power coefficient in units of uW/MHz/V^2 59 power coefficient in units of uW/MHz/V^2. The 94 coefficient can either be calculated fro 60 coefficient can either be calculated from power 95 measurements or derived by analysis. 61 measurements or derived by analysis. 96 62 97 The dynamic power consumption of the GPU 63 The dynamic power consumption of the GPU is 98 proportional to the square of the Voltag 64 proportional to the square of the Voltage (V) and 99 the clock frequency (f). The coefficient 65 the clock frequency (f). The coefficient is used to 100 calculate the dynamic power as below - 66 calculate the dynamic power as below - 101 67 102 Pdyn = dynamic-power-coefficient * V^2 * 68 Pdyn = dynamic-power-coefficient * V^2 * f 103 69 104 where voltage is in V, frequency is in M 70 where voltage is in V, frequency is in MHz. 105 71 106 dma-coherent: true << 107 << 108 nvmem-cell-names: << 109 items: << 110 - const: speed-bin << 111 << 112 nvmem-cells: << 113 maxItems: 1 << 114 << 115 required: 72 required: 116 - compatible 73 - compatible 117 - reg 74 - reg 118 - interrupts 75 - interrupts 119 - interrupt-names 76 - interrupt-names 120 - clocks 77 - clocks 121 78 122 additionalProperties: false 79 additionalProperties: false 123 80 124 allOf: 81 allOf: 125 - if: 82 - if: 126 properties: 83 properties: 127 compatible: 84 compatible: 128 contains: 85 contains: 129 const: amlogic,meson-g12a-mali 86 const: amlogic,meson-g12a-mali 130 then: 87 then: 131 properties: << 132 power-domains: << 133 maxItems: 1 << 134 power-domain-names: false << 135 required: 88 required: 136 - resets 89 - resets 137 - if: << 138 properties: << 139 compatible: << 140 contains: << 141 enum: << 142 - renesas,r9a07g044-mali << 143 - renesas,r9a07g054-mali << 144 then: << 145 properties: << 146 interrupts: << 147 minItems: 4 << 148 interrupt-names: << 149 minItems: 4 << 150 clocks: << 151 minItems: 3 << 152 clock-names: << 153 items: << 154 - const: gpu << 155 - const: bus << 156 - const: bus_ace << 157 power-domains: << 158 maxItems: 1 << 159 power-domain-names: false << 160 resets: << 161 minItems: 3 << 162 reset-names: << 163 items: << 164 - const: rst << 165 - const: axi_rst << 166 - const: ace_rst << 167 required: << 168 - clock-names << 169 - power-domains << 170 - resets << 171 - reset-names << 172 - if: << 173 properties: << 174 compatible: << 175 contains: << 176 const: mediatek,mt8183-mali << 177 then: << 178 properties: << 179 power-domains: << 180 minItems: 3 << 181 maxItems: 3 << 182 power-domain-names: << 183 items: << 184 - const: core0 << 185 - const: core1 << 186 - const: core2 << 187 << 188 required: << 189 - sram-supply << 190 - power-domains << 191 - power-domain-names << 192 else: << 193 properties: << 194 sram-supply: false << 195 - if: << 196 properties: << 197 compatible: << 198 contains: << 199 enum: << 200 - mediatek,mt8183b-mali << 201 - mediatek,mt8188-mali << 202 then: << 203 properties: << 204 power-domains: << 205 minItems: 3 << 206 maxItems: 3 << 207 power-domain-names: << 208 items: << 209 - const: core0 << 210 - const: core1 << 211 - const: core2 << 212 required: << 213 - power-domains << 214 - power-domain-names << 215 - if: << 216 properties: << 217 compatible: << 218 contains: << 219 const: mediatek,mt8186-mali << 220 then: << 221 properties: << 222 power-domains: << 223 minItems: 2 << 224 maxItems: 2 << 225 power-domain-names: << 226 items: << 227 - const: core0 << 228 - const: core1 << 229 required: << 230 - power-domains << 231 - power-domain-names << 232 - if: << 233 properties: << 234 compatible: << 235 contains: << 236 const: mediatek,mt8192-mali << 237 then: << 238 properties: << 239 power-domains: << 240 minItems: 5 << 241 power-domain-names: << 242 items: << 243 - const: core0 << 244 - const: core1 << 245 - const: core2 << 246 - const: core3 << 247 - const: core4 << 248 required: << 249 - power-domains << 250 - power-domain-names << 251 - if: << 252 properties: << 253 compatible: << 254 contains: << 255 const: rockchip,rk3568-mali << 256 then: << 257 properties: << 258 clocks: << 259 minItems: 2 << 260 clock-names: << 261 items: << 262 - const: gpu << 263 - const: bus << 264 power-domains: << 265 maxItems: 1 << 266 power-domain-names: false << 267 required: << 268 - clock-names << 269 90 270 examples: 91 examples: 271 - | 92 - | 272 #include <dt-bindings/interrupt-controller 93 #include <dt-bindings/interrupt-controller/irq.h> 273 #include <dt-bindings/interrupt-controller 94 #include <dt-bindings/interrupt-controller/arm-gic.h> 274 95 275 gpu@ffe40000 { 96 gpu@ffe40000 { 276 compatible = "amlogic,meson-g12a-mali", 97 compatible = "amlogic,meson-g12a-mali", "arm,mali-bifrost"; 277 reg = <0xffe40000 0x10000>; 98 reg = <0xffe40000 0x10000>; 278 interrupts = <GIC_SPI 160 IRQ_TYPE_LEVEL 99 interrupts = <GIC_SPI 160 IRQ_TYPE_LEVEL_HIGH>, 279 <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH> 100 <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>, 280 <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH> 101 <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>; 281 interrupt-names = "job", "mmu", "gpu"; 102 interrupt-names = "job", "mmu", "gpu"; 282 clocks = <&clk 1>; 103 clocks = <&clk 1>; 283 mali-supply = <&vdd_gpu>; 104 mali-supply = <&vdd_gpu>; 284 operating-points-v2 = <&gpu_opp_table>; 105 operating-points-v2 = <&gpu_opp_table>; 285 resets = <&reset 0>, <&reset 1>; 106 resets = <&reset 0>, <&reset 1>; 286 }; 107 }; 287 108 288 gpu_opp_table: opp-table { !! 109 gpu_opp_table: opp_table0 { 289 compatible = "operating-points-v2"; 110 compatible = "operating-points-v2"; 290 111 291 opp-533000000 { 112 opp-533000000 { 292 opp-hz = /bits/ 64 <533000000>; 113 opp-hz = /bits/ 64 <533000000>; 293 opp-microvolt = <1250000>; 114 opp-microvolt = <1250000>; 294 }; 115 }; 295 opp-450000000 { 116 opp-450000000 { 296 opp-hz = /bits/ 64 <450000000>; 117 opp-hz = /bits/ 64 <450000000>; 297 opp-microvolt = <1150000>; 118 opp-microvolt = <1150000>; 298 }; 119 }; 299 opp-400000000 { 120 opp-400000000 { 300 opp-hz = /bits/ 64 <400000000>; 121 opp-hz = /bits/ 64 <400000000>; 301 opp-microvolt = <1125000>; 122 opp-microvolt = <1125000>; 302 }; 123 }; 303 opp-350000000 { 124 opp-350000000 { 304 opp-hz = /bits/ 64 <350000000>; 125 opp-hz = /bits/ 64 <350000000>; 305 opp-microvolt = <1075000>; 126 opp-microvolt = <1075000>; 306 }; 127 }; 307 opp-266000000 { 128 opp-266000000 { 308 opp-hz = /bits/ 64 <266000000>; 129 opp-hz = /bits/ 64 <266000000>; 309 opp-microvolt = <1025000>; 130 opp-microvolt = <1025000>; 310 }; 131 }; 311 opp-160000000 { 132 opp-160000000 { 312 opp-hz = /bits/ 64 <160000000>; 133 opp-hz = /bits/ 64 <160000000>; 313 opp-microvolt = <925000>; 134 opp-microvolt = <925000>; 314 }; 135 }; 315 opp-100000000 { 136 opp-100000000 { 316 opp-hz = /bits/ 64 <100000000>; 137 opp-hz = /bits/ 64 <100000000>; 317 opp-microvolt = <912500>; 138 opp-microvolt = <912500>; 318 }; 139 }; 319 }; 140 }; 320 141 321 ... 142 ...
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