1 # SPDX-License-Identifier: GPL-2.0-only 1 # SPDX-License-Identifier: GPL-2.0-only
2 %YAML 1.2 2 %YAML 1.2
3 --- 3 ---
4 $id: http://devicetree.org/schemas/gpu/arm,mal 4 $id: http://devicetree.org/schemas/gpu/arm,mali-bifrost.yaml#
5 $schema: http://devicetree.org/meta-schemas/co 5 $schema: http://devicetree.org/meta-schemas/core.yaml#
6 6
7 title: ARM Mali Bifrost GPU 7 title: ARM Mali Bifrost GPU
8 8
9 maintainers: 9 maintainers:
10 - Rob Herring <robh@kernel.org> 10 - Rob Herring <robh@kernel.org>
11 11
12 properties: 12 properties:
13 $nodename: 13 $nodename:
14 pattern: '^gpu@[a-f0-9]+$' 14 pattern: '^gpu@[a-f0-9]+$'
15 15
16 compatible: 16 compatible:
17 oneOf: 17 oneOf:
18 - items: 18 - items:
19 - enum: 19 - enum:
20 - amlogic,meson-g12a-mali 20 - amlogic,meson-g12a-mali
21 - mediatek,mt8183-mali 21 - mediatek,mt8183-mali
22 - mediatek,mt8183b-mali <<
23 - mediatek,mt8186-mali <<
24 - realtek,rtd1619-mali 22 - realtek,rtd1619-mali
25 - renesas,r9a07g044-mali 23 - renesas,r9a07g044-mali
26 - renesas,r9a07g054-mali 24 - renesas,r9a07g054-mali
27 - rockchip,px30-mali 25 - rockchip,px30-mali
28 - rockchip,rk3568-mali 26 - rockchip,rk3568-mali
29 - const: arm,mali-bifrost # Mali Bif 27 - const: arm,mali-bifrost # Mali Bifrost GPU model/revision is fully discoverable
30 - items: 28 - items:
31 - enum: 29 - enum:
32 - mediatek,mt8195-mali <<
33 - const: mediatek,mt8192-mali <<
34 - const: arm,mali-valhall-jm # Mali <<
35 - items: <<
36 - enum: <<
37 - mediatek,mt8188-mali <<
38 - mediatek,mt8192-mali 30 - mediatek,mt8192-mali
39 - const: arm,mali-valhall-jm # Mali 31 - const: arm,mali-valhall-jm # Mali Valhall GPU model/revision is fully discoverable
40 32
41 reg: 33 reg:
42 maxItems: 1 34 maxItems: 1
43 35
44 interrupts: 36 interrupts:
45 minItems: 3 37 minItems: 3
46 items: 38 items:
47 - description: Job interrupt 39 - description: Job interrupt
48 - description: MMU interrupt 40 - description: MMU interrupt
49 - description: GPU interrupt 41 - description: GPU interrupt
50 - description: Event interrupt 42 - description: Event interrupt
51 43
52 interrupt-names: 44 interrupt-names:
53 minItems: 3 45 minItems: 3
54 items: 46 items:
55 - const: job 47 - const: job
56 - const: mmu 48 - const: mmu
57 - const: gpu 49 - const: gpu
58 - const: event 50 - const: event
59 51
60 clocks: 52 clocks:
61 minItems: 1 53 minItems: 1
62 maxItems: 3 54 maxItems: 3
63 55
64 clock-names: true 56 clock-names: true
65 57
66 mali-supply: true 58 mali-supply: true
67 59
68 sram-supply: true 60 sram-supply: true
69 61
70 operating-points-v2: true 62 operating-points-v2: true
71 63
72 power-domains: 64 power-domains:
73 minItems: 1 65 minItems: 1
74 maxItems: 5 !! 66 maxItems: 3
75 <<
76 power-domain-names: <<
77 minItems: 2 <<
78 maxItems: 5 <<
79 67
80 resets: 68 resets:
81 minItems: 1 69 minItems: 1
82 maxItems: 3 70 maxItems: 3
83 71
84 reset-names: true 72 reset-names: true
85 73
86 "#cooling-cells": 74 "#cooling-cells":
87 const: 2 75 const: 2
88 76
89 dynamic-power-coefficient: 77 dynamic-power-coefficient:
90 $ref: /schemas/types.yaml#/definitions/uin !! 78 $ref: '/schemas/types.yaml#/definitions/uint32'
91 description: 79 description:
92 A u32 value that represents the running 80 A u32 value that represents the running time dynamic
93 power coefficient in units of uW/MHz/V^2 81 power coefficient in units of uW/MHz/V^2. The
94 coefficient can either be calculated fro 82 coefficient can either be calculated from power
95 measurements or derived by analysis. 83 measurements or derived by analysis.
96 84
97 The dynamic power consumption of the GPU 85 The dynamic power consumption of the GPU is
98 proportional to the square of the Voltag 86 proportional to the square of the Voltage (V) and
99 the clock frequency (f). The coefficient 87 the clock frequency (f). The coefficient is used to
100 calculate the dynamic power as below - 88 calculate the dynamic power as below -
101 89
102 Pdyn = dynamic-power-coefficient * V^2 * 90 Pdyn = dynamic-power-coefficient * V^2 * f
103 91
104 where voltage is in V, frequency is in M 92 where voltage is in V, frequency is in MHz.
105 93
106 dma-coherent: true 94 dma-coherent: true
107 95
108 nvmem-cell-names: <<
109 items: <<
110 - const: speed-bin <<
111 <<
112 nvmem-cells: <<
113 maxItems: 1 <<
114 <<
115 required: 96 required:
116 - compatible 97 - compatible
117 - reg 98 - reg
118 - interrupts 99 - interrupts
119 - interrupt-names 100 - interrupt-names
120 - clocks 101 - clocks
121 102
122 additionalProperties: false 103 additionalProperties: false
123 104
124 allOf: 105 allOf:
125 - if: 106 - if:
126 properties: 107 properties:
127 compatible: 108 compatible:
128 contains: 109 contains:
129 const: amlogic,meson-g12a-mali 110 const: amlogic,meson-g12a-mali
130 then: 111 then:
131 properties: <<
132 power-domains: <<
133 maxItems: 1 <<
134 power-domain-names: false <<
135 required: 112 required:
136 - resets 113 - resets
137 - if: 114 - if:
138 properties: 115 properties:
139 compatible: 116 compatible:
140 contains: 117 contains:
141 enum: 118 enum:
142 - renesas,r9a07g044-mali 119 - renesas,r9a07g044-mali
143 - renesas,r9a07g054-mali 120 - renesas,r9a07g054-mali
144 then: 121 then:
145 properties: 122 properties:
146 interrupts: 123 interrupts:
147 minItems: 4 124 minItems: 4
148 interrupt-names: 125 interrupt-names:
149 minItems: 4 126 minItems: 4
150 clocks: 127 clocks:
151 minItems: 3 128 minItems: 3
152 clock-names: 129 clock-names:
153 items: 130 items:
154 - const: gpu 131 - const: gpu
155 - const: bus 132 - const: bus
156 - const: bus_ace 133 - const: bus_ace
157 power-domains: <<
158 maxItems: 1 <<
159 power-domain-names: false <<
160 resets: 134 resets:
161 minItems: 3 135 minItems: 3
162 reset-names: 136 reset-names:
163 items: 137 items:
164 - const: rst 138 - const: rst
165 - const: axi_rst 139 - const: axi_rst
166 - const: ace_rst 140 - const: ace_rst
167 required: 141 required:
168 - clock-names 142 - clock-names
169 - power-domains 143 - power-domains
170 - resets 144 - resets
171 - reset-names 145 - reset-names
172 - if: 146 - if:
173 properties: 147 properties:
174 compatible: 148 compatible:
175 contains: 149 contains:
176 const: mediatek,mt8183-mali 150 const: mediatek,mt8183-mali
177 then: 151 then:
178 properties: 152 properties:
179 power-domains: 153 power-domains:
180 minItems: 3 154 minItems: 3
181 maxItems: 3 <<
182 power-domain-names: 155 power-domain-names:
183 items: 156 items:
184 - const: core0 157 - const: core0
185 - const: core1 158 - const: core1
186 - const: core2 159 - const: core2
187 160
188 required: 161 required:
189 - sram-supply 162 - sram-supply
190 - power-domains 163 - power-domains
191 - power-domain-names 164 - power-domain-names
192 else: 165 else:
193 properties: 166 properties:
194 sram-supply: false <<
195 - if: <<
196 properties: <<
197 compatible: <<
198 contains: <<
199 enum: <<
200 - mediatek,mt8183b-mali <<
201 - mediatek,mt8188-mali <<
202 then: <<
203 properties: <<
204 power-domains: 167 power-domains:
205 minItems: 3 !! 168 maxItems: 1
206 maxItems: 3 !! 169 sram-supply: false
207 power-domain-names: <<
208 items: <<
209 - const: core0 <<
210 - const: core1 <<
211 - const: core2 <<
212 required: <<
213 - power-domains <<
214 - power-domain-names <<
215 - if: <<
216 properties: <<
217 compatible: <<
218 contains: <<
219 const: mediatek,mt8186-mali <<
220 then: <<
221 properties: <<
222 power-domains: <<
223 minItems: 2 <<
224 maxItems: 2 <<
225 power-domain-names: <<
226 items: <<
227 - const: core0 <<
228 - const: core1 <<
229 required: <<
230 - power-domains <<
231 - power-domain-names <<
232 - if: <<
233 properties: <<
234 compatible: <<
235 contains: <<
236 const: mediatek,mt8192-mali <<
237 then: <<
238 properties: <<
239 power-domains: <<
240 minItems: 5 <<
241 power-domain-names: <<
242 items: <<
243 - const: core0 <<
244 - const: core1 <<
245 - const: core2 <<
246 - const: core3 <<
247 - const: core4 <<
248 required: <<
249 - power-domains <<
250 - power-domain-names <<
251 - if: 170 - if:
252 properties: 171 properties:
253 compatible: 172 compatible:
254 contains: 173 contains:
255 const: rockchip,rk3568-mali 174 const: rockchip,rk3568-mali
256 then: 175 then:
257 properties: 176 properties:
258 clocks: 177 clocks:
259 minItems: 2 178 minItems: 2
260 clock-names: 179 clock-names:
261 items: 180 items:
262 - const: gpu 181 - const: gpu
263 - const: bus 182 - const: bus
264 power-domains: <<
265 maxItems: 1 <<
266 power-domain-names: false <<
267 required: 183 required:
268 - clock-names 184 - clock-names
269 185
270 examples: 186 examples:
271 - | 187 - |
272 #include <dt-bindings/interrupt-controller 188 #include <dt-bindings/interrupt-controller/irq.h>
273 #include <dt-bindings/interrupt-controller 189 #include <dt-bindings/interrupt-controller/arm-gic.h>
274 190
275 gpu@ffe40000 { 191 gpu@ffe40000 {
276 compatible = "amlogic,meson-g12a-mali", 192 compatible = "amlogic,meson-g12a-mali", "arm,mali-bifrost";
277 reg = <0xffe40000 0x10000>; 193 reg = <0xffe40000 0x10000>;
278 interrupts = <GIC_SPI 160 IRQ_TYPE_LEVEL 194 interrupts = <GIC_SPI 160 IRQ_TYPE_LEVEL_HIGH>,
279 <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH> 195 <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>,
280 <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH> 196 <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>;
281 interrupt-names = "job", "mmu", "gpu"; 197 interrupt-names = "job", "mmu", "gpu";
282 clocks = <&clk 1>; 198 clocks = <&clk 1>;
283 mali-supply = <&vdd_gpu>; 199 mali-supply = <&vdd_gpu>;
284 operating-points-v2 = <&gpu_opp_table>; 200 operating-points-v2 = <&gpu_opp_table>;
285 resets = <&reset 0>, <&reset 1>; 201 resets = <&reset 0>, <&reset 1>;
286 }; 202 };
287 203
288 gpu_opp_table: opp-table { 204 gpu_opp_table: opp-table {
289 compatible = "operating-points-v2"; 205 compatible = "operating-points-v2";
290 206
291 opp-533000000 { 207 opp-533000000 {
292 opp-hz = /bits/ 64 <533000000>; 208 opp-hz = /bits/ 64 <533000000>;
293 opp-microvolt = <1250000>; 209 opp-microvolt = <1250000>;
294 }; 210 };
295 opp-450000000 { 211 opp-450000000 {
296 opp-hz = /bits/ 64 <450000000>; 212 opp-hz = /bits/ 64 <450000000>;
297 opp-microvolt = <1150000>; 213 opp-microvolt = <1150000>;
298 }; 214 };
299 opp-400000000 { 215 opp-400000000 {
300 opp-hz = /bits/ 64 <400000000>; 216 opp-hz = /bits/ 64 <400000000>;
301 opp-microvolt = <1125000>; 217 opp-microvolt = <1125000>;
302 }; 218 };
303 opp-350000000 { 219 opp-350000000 {
304 opp-hz = /bits/ 64 <350000000>; 220 opp-hz = /bits/ 64 <350000000>;
305 opp-microvolt = <1075000>; 221 opp-microvolt = <1075000>;
306 }; 222 };
307 opp-266000000 { 223 opp-266000000 {
308 opp-hz = /bits/ 64 <266000000>; 224 opp-hz = /bits/ 64 <266000000>;
309 opp-microvolt = <1025000>; 225 opp-microvolt = <1025000>;
310 }; 226 };
311 opp-160000000 { 227 opp-160000000 {
312 opp-hz = /bits/ 64 <160000000>; 228 opp-hz = /bits/ 64 <160000000>;
313 opp-microvolt = <925000>; 229 opp-microvolt = <925000>;
314 }; 230 };
315 opp-100000000 { 231 opp-100000000 {
316 opp-hz = /bits/ 64 <100000000>; 232 opp-hz = /bits/ 64 <100000000>;
317 opp-microvolt = <912500>; 233 opp-microvolt = <912500>;
318 }; 234 };
319 }; 235 };
320 236
321 ... 237 ...
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