1 Nuvoton NPCM PWM and Fan Tacho controller devi 1 Nuvoton NPCM PWM and Fan Tacho controller device
2 2
3 The Nuvoton BMC NPCM7XX supports 8 Pulse-width 3 The Nuvoton BMC NPCM7XX supports 8 Pulse-width modulation (PWM)
4 controller outputs and 16 Fan tachometer contr 4 controller outputs and 16 Fan tachometer controller inputs.
5 5
6 The Nuvoton BMC NPCM8XX supports 12 Pulse-widt 6 The Nuvoton BMC NPCM8XX supports 12 Pulse-width modulation (PWM)
7 controller outputs and 16 Fan tachometer contr 7 controller outputs and 16 Fan tachometer controller inputs.
8 8
9 Required properties for pwm-fan node 9 Required properties for pwm-fan node
10 - #address-cells : should be 1. 10 - #address-cells : should be 1.
11 - #size-cells : should be 0. 11 - #size-cells : should be 0.
12 - compatible : "nuvoton,npcm750-pwm-fan" fo 12 - compatible : "nuvoton,npcm750-pwm-fan" for Poleg NPCM7XX.
13 : "nuvoton,npc 13 : "nuvoton,npcm845-pwm-fan" for Arbel NPCM8XX.
14 - reg : specifies physical b 14 - reg : specifies physical base address and size of the registers.
15 - reg-names : must contain: 15 - reg-names : must contain:
16 * "pwm 16 * "pwm" for the PWM registers.
17 * "fan 17 * "fan" for the Fan registers.
18 - clocks : phandle of reference 18 - clocks : phandle of reference clocks.
19 - clock-names : must contain 19 - clock-names : must contain
20 * "pwm 20 * "pwm" for PWM controller operating clock.
21 * "fan 21 * "fan" for Fan controller operating clock.
22 - interrupts : contain the Fan interrupts w 22 - interrupts : contain the Fan interrupts with flags for falling edge.
23 - pinctrl-names : a pinctrl state named "defau 23 - pinctrl-names : a pinctrl state named "default" must be defined.
24 - pinctrl-0 : phandle referencing pin conf 24 - pinctrl-0 : phandle referencing pin configuration of the PWM and Fan
25 contro 25 controller ports.
26 26
27 fan subnode format: 27 fan subnode format:
28 =================== 28 ===================
29 Under fan subnode can be upto 8 child nodes, e 29 Under fan subnode can be upto 8 child nodes, each child node representing a fan.
30 Each fan subnode must have one PWM channel and 30 Each fan subnode must have one PWM channel and at least one Fan tach channel.
31 31
32 For PWM channel can be configured cooling-leve 32 For PWM channel can be configured cooling-levels to create cooling device.
33 Cooling device could be bound to a thermal zon 33 Cooling device could be bound to a thermal zone for the thermal control.
34 34
35 Required properties for each child node: 35 Required properties for each child node:
36 - reg : specify the PWM output channel. 36 - reg : specify the PWM output channel.
37 integer value in the range 0 through 7 37 integer value in the range 0 through 7, that represent
38 the PWM channel number that used. 38 the PWM channel number that used.
39 39
40 - fan-tach-ch : specify the Fan tach input cha 40 - fan-tach-ch : specify the Fan tach input channel.
41 integer value in the range 0 t 41 integer value in the range 0 through 15, that represent
42 the fan tach channel number th 42 the fan tach channel number that used.
43 43
44 At least one Fan tach input ch 44 At least one Fan tach input channel is required
45 45
46 Optional property for each child node: 46 Optional property for each child node:
47 - cooling-levels: PWM duty cycle values in a r 47 - cooling-levels: PWM duty cycle values in a range from 0 to 255
48 which correspond to thermal 48 which correspond to thermal cooling states.
49 49
50 Examples: 50 Examples:
51 51
52 pwm_fan:pwm-fan-controller@103000 { 52 pwm_fan:pwm-fan-controller@103000 {
53 #address-cells = <1>; 53 #address-cells = <1>;
54 #size-cells = <0>; 54 #size-cells = <0>;
55 compatible = "nuvoton,npcm750-pwm-fan" 55 compatible = "nuvoton,npcm750-pwm-fan";
56 reg = <0x103000 0x2000>, 56 reg = <0x103000 0x2000>,
57 <0x180000 0x8000>; 57 <0x180000 0x8000>;
58 reg-names = "pwm", "fan"; 58 reg-names = "pwm", "fan";
59 clocks = <&clk NPCM7XX_CLK_APB3>, 59 clocks = <&clk NPCM7XX_CLK_APB3>,
60 <&clk NPCM7XX_CLK_APB4>; 60 <&clk NPCM7XX_CLK_APB4>;
61 clock-names = "pwm","fan"; 61 clock-names = "pwm","fan";
62 interrupts = <GIC_SPI 96 IRQ_TYPE_LEVE 62 interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>,
63 <GIC_SPI 97 IRQ_TYPE_L 63 <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>,
64 <GIC_SPI 98 IRQ_TYPE_L 64 <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>,
65 <GIC_SPI 99 IRQ_TYPE_L 65 <GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>,
66 <GIC_SPI 100 IRQ_TYPE_ 66 <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>,
67 <GIC_SPI 101 IRQ_TYPE_ 67 <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>,
68 <GIC_SPI 102 IRQ_TYPE_ 68 <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>,
69 <GIC_SPI 103 IRQ_TYPE_ 69 <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>;
70 pinctrl-names = "default"; 70 pinctrl-names = "default";
71 pinctrl-0 = <&pwm0_pins &pwm1_pins &pw 71 pinctrl-0 = <&pwm0_pins &pwm1_pins &pwm2_pins
72 &fanin0_pins &fanin1_p 72 &fanin0_pins &fanin1_pins &fanin2_pins
73 &fanin3_pins &fanin4_p 73 &fanin3_pins &fanin4_pins>;
74 fan@0 { 74 fan@0 {
75 reg = <0x00>; 75 reg = <0x00>;
76 fan-tach-ch = /bits/ 8 <0x00 0 76 fan-tach-ch = /bits/ 8 <0x00 0x01>;
77 cooling-levels = <127 255>; 77 cooling-levels = <127 255>;
78 }; 78 };
79 fan@1 { 79 fan@1 {
80 reg = <0x01>; 80 reg = <0x01>;
81 fan-tach-ch = /bits/ 8 <0x02 0 81 fan-tach-ch = /bits/ 8 <0x02 0x03>;
82 }; 82 };
83 fan@2 { 83 fan@2 {
84 reg = <0x02>; 84 reg = <0x02>;
85 fan-tach-ch = /bits/ 8 <0x04>; 85 fan-tach-ch = /bits/ 8 <0x04>;
86 }; 86 };
87 87
88 }; 88 };
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