1 # SPDX-License-Identifier: GPL-2.0 1 # SPDX-License-Identifier: GPL-2.0
2 %YAML 1.2 2 %YAML 1.2
3 --- 3 ---
4 $id: http://devicetree.org/schemas/i2c/i2c-mux 4 $id: http://devicetree.org/schemas/i2c/i2c-mux-gpmux.yaml#
5 $schema: http://devicetree.org/meta-schemas/co 5 $schema: http://devicetree.org/meta-schemas/core.yaml#
6 6
7 title: General Purpose I2C Bus Mux 7 title: General Purpose I2C Bus Mux
8 8
9 maintainers: 9 maintainers:
10 - Peter Rosin <peda@axentia.se> 10 - Peter Rosin <peda@axentia.se>
11 11
12 description: |+ 12 description: |+
13 This binding describes an I2C bus multiplexe 13 This binding describes an I2C bus multiplexer that uses a mux controller
14 from the mux subsystem to route the I2C sign 14 from the mux subsystem to route the I2C signals.
15 15
16 .-----. . 16 .-----. .-----.
17 | dev | | 17 | dev | | dev |
18 .------------. '-----' ' 18 .------------. '-----' '-----'
19 | SoC | | 19 | SoC | | |
20 | | .--------+------ 20 | | .--------+--------'
21 | .------. | .------+ child bus A, 21 | .------. | .------+ child bus A, on MUX value set to 0
22 | | I2C |-|--| Mux | 22 | | I2C |-|--| Mux |
23 | '------' | '--+---+ child bus B, 23 | '------' | '--+---+ child bus B, on MUX value set to 1
24 | .------. | | '----------+---- 24 | .------. | | '----------+--------+--------.
25 | | MUX- | | | | 25 | | MUX- | | | | | |
26 | | Ctrl |-|-----+ .-----. 26 | | Ctrl |-|-----+ .-----. .-----. .-----.
27 | '------' | | dev | 27 | '------' | | dev | | dev | | dev |
28 '------------' '-----' 28 '------------' '-----' '-----' '-----'
29 29
30 30
31 allOf: 31 allOf:
32 - $ref: /schemas/i2c/i2c-mux.yaml# 32 - $ref: /schemas/i2c/i2c-mux.yaml#
33 33
34 properties: 34 properties:
35 compatible: 35 compatible:
36 const: i2c-mux 36 const: i2c-mux
37 37
38 i2c-parent: 38 i2c-parent:
39 $ref: /schemas/types.yaml#/definitions/pha 39 $ref: /schemas/types.yaml#/definitions/phandle
40 description: 40 description:
41 The phandle of the I2C bus that this mul 41 The phandle of the I2C bus that this multiplexer's master-side port is
42 connected to. 42 connected to.
43 43
44 mux-controls: 44 mux-controls:
45 maxItems: 1 45 maxItems: 1
46 description: 46 description:
47 The mux-controller states are the I2C su 47 The mux-controller states are the I2C sub-bus numbers.
48 48
49 mux-locked: 49 mux-locked:
50 type: boolean 50 type: boolean
51 description: | 51 description: |
52 Explicitly allow unrelated I2C transacti 52 Explicitly allow unrelated I2C transactions on the parent I2C adapter at
53 these times: 53 these times:
54 - during setup of the multiplexer 54 - during setup of the multiplexer
55 - between setup of the multiplexer and 55 - between setup of the multiplexer and the child bus I2C transaction
56 - between the child bus I2C transaction 56 - between the child bus I2C transaction and releasing of the multiplexer
57 - during releasing of the multiplexer 57 - during releasing of the multiplexer
58 58
59 However, I2C transactions to devices beh 59 However, I2C transactions to devices behind all I2C multiplexers connected
60 to the same parent adapter that this mul 60 to the same parent adapter that this multiplexer is connected to are blocked
61 for the full duration of the complete mu 61 for the full duration of the complete multiplexed I2C transaction (i.e.
62 including the times covered by the above 62 including the times covered by the above list).
63 If mux-locked is not present, the multip 63 If mux-locked is not present, the multiplexer is assumed to be parent-locked.
64 This means that no unrelated I2C transac 64 This means that no unrelated I2C transactions are allowed on the parent I2C
65 adapter for the complete multiplexed I2C 65 adapter for the complete multiplexed I2C transaction.
66 The properties of mux-locked and parent- 66 The properties of mux-locked and parent-locked multiplexers are discussed
67 in more detail in Documentation/i2c/i2c- 67 in more detail in Documentation/i2c/i2c-topology.rst.
68 68
69 required: 69 required:
70 - compatible 70 - compatible
71 - i2c-parent 71 - i2c-parent
72 - mux-controls 72 - mux-controls
73 73
74 unevaluatedProperties: false 74 unevaluatedProperties: false
75 75
76 examples: 76 examples:
77 - | 77 - |
78 #include <dt-bindings/gpio/gpio.h> 78 #include <dt-bindings/gpio/gpio.h>
79 mux: mux-controller { 79 mux: mux-controller {
80 compatible = "gpio-mux"; 80 compatible = "gpio-mux";
81 #mux-control-cells = <0>; 81 #mux-control-cells = <0>;
82 82
83 mux-gpios = <&pioA 0 GPIO_ACTIVE_HIGH> 83 mux-gpios = <&pioA 0 GPIO_ACTIVE_HIGH>,
84 <&pioA 1 GPIO_ACTIVE_HIGH> 84 <&pioA 1 GPIO_ACTIVE_HIGH>;
85 }; 85 };
86 86
87 i2c-mux { 87 i2c-mux {
88 compatible = "i2c-mux"; 88 compatible = "i2c-mux";
89 mux-locked; 89 mux-locked;
90 i2c-parent = <&i2c1>; 90 i2c-parent = <&i2c1>;
91 91
92 mux-controls = <&mux>; 92 mux-controls = <&mux>;
93 93
94 #address-cells = <1>; 94 #address-cells = <1>;
95 #size-cells = <0>; 95 #size-cells = <0>;
96 96
97 i2c@1 { 97 i2c@1 {
98 reg = <1>; 98 reg = <1>;
99 #address-cells = <1>; 99 #address-cells = <1>;
100 #size-cells = <0>; 100 #size-cells = <0>;
101 101
102 gpio@20 { 102 gpio@20 {
103 compatible = "nxp,pca9555"; 103 compatible = "nxp,pca9555";
104 gpio-controller; 104 gpio-controller;
105 #gpio-cells = <2>; 105 #gpio-cells = <2>;
106 reg = <0x20>; 106 reg = <0x20>;
107 }; 107 };
108 }; 108 };
109 109
110 i2c@3 { 110 i2c@3 {
111 reg = <3>; 111 reg = <3>;
112 #address-cells = <1>; 112 #address-cells = <1>;
113 #size-cells = <0>; 113 #size-cells = <0>;
114 114
115 gpio@20 { 115 gpio@20 {
116 compatible = "nxp,pca9555"; 116 compatible = "nxp,pca9555";
117 gpio-controller; 117 gpio-controller;
118 #gpio-cells = <2>; 118 #gpio-cells = <2>;
119 reg = <0x20>; 119 reg = <0x20>;
120 }; 120 };
121 }; 121 };
122 }; 122 };
123 ... 123 ...
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