1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-C 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
2 # Copyright 2019 Analog Devices Inc. 2 # Copyright 2019 Analog Devices Inc.
3 %YAML 1.2 3 %YAML 1.2
4 --- 4 ---
5 $id: http://devicetree.org/schemas/iio/adc/adi 5 $id: http://devicetree.org/schemas/iio/adc/adi,ad7124.yaml#
6 $schema: http://devicetree.org/meta-schemas/co 6 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 7
8 title: Analog Devices AD7124 ADC device driver 8 title: Analog Devices AD7124 ADC device driver
9 9
10 maintainers: 10 maintainers:
11 - Stefan Popa <stefan.popa@analog.com> 11 - Stefan Popa <stefan.popa@analog.com>
12 12
13 description: | 13 description: |
14 Bindings for the Analog Devices AD7124 ADC d 14 Bindings for the Analog Devices AD7124 ADC device. Datasheet can be
15 found here: 15 found here:
16 https://www.analog.com/media/en/technical- 16 https://www.analog.com/media/en/technical-documentation/data-sheets/AD7124-8.pdf
17 17
18 properties: 18 properties:
19 compatible: 19 compatible:
20 enum: 20 enum:
21 - adi,ad7124-4 21 - adi,ad7124-4
22 - adi,ad7124-8 22 - adi,ad7124-8
23 23
24 reg: 24 reg:
25 description: SPI chip select number for th 25 description: SPI chip select number for the device
26 maxItems: 1 26 maxItems: 1
27 27
28 clocks: 28 clocks:
29 maxItems: 1 29 maxItems: 1
30 description: phandle to the master clock ( 30 description: phandle to the master clock (mclk)
31 31
32 clock-names: 32 clock-names:
33 items: 33 items:
34 - const: mclk 34 - const: mclk
35 35
36 interrupts: 36 interrupts:
37 description: IRQ line for the ADC 37 description: IRQ line for the ADC
38 maxItems: 1 38 maxItems: 1
39 39
40 '#address-cells': 40 '#address-cells':
41 const: 1 41 const: 1
42 42
43 '#size-cells': 43 '#size-cells':
44 const: 0 44 const: 0
45 45
46 refin1-supply: 46 refin1-supply:
47 description: refin1 supply can be used as 47 description: refin1 supply can be used as reference for conversion.
48 48
49 refin2-supply: 49 refin2-supply:
50 description: refin2 supply can be used as 50 description: refin2 supply can be used as reference for conversion.
51 51
52 avdd-supply: 52 avdd-supply:
53 description: avdd supply can be used as re 53 description: avdd supply can be used as reference for conversion.
54 54
55 required: 55 required:
56 - compatible 56 - compatible
57 - reg 57 - reg
58 - clocks 58 - clocks
59 - clock-names 59 - clock-names
60 - interrupts 60 - interrupts
61 61
62 patternProperties: 62 patternProperties:
63 "^channel@([0-9]|1[0-5])$": 63 "^channel@([0-9]|1[0-5])$":
64 $ref: adc.yaml 64 $ref: adc.yaml
65 type: object 65 type: object
66 description: | 66 description: |
67 Represents the external channels which a 67 Represents the external channels which are connected to the ADC.
68 68
69 properties: 69 properties:
70 reg: 70 reg:
71 description: | 71 description: |
72 The channel number. It can have up t 72 The channel number. It can have up to 8 channels on ad7124-4
73 and 16 channels on ad7124-8, numbere 73 and 16 channels on ad7124-8, numbered from 0 to 15.
74 items: 74 items:
75 minimum: 0 75 minimum: 0
76 maximum: 15 76 maximum: 15
77 77
78 adi,reference-select: 78 adi,reference-select:
79 description: | 79 description: |
80 Select the reference source to use w 80 Select the reference source to use when converting on
81 the specific channel. Valid values a 81 the specific channel. Valid values are:
82 0: REFIN1(+)/REFIN1(−). 82 0: REFIN1(+)/REFIN1(−).
83 1: REFIN2(+)/REFIN2(−). 83 1: REFIN2(+)/REFIN2(−).
84 3: AVDD 84 3: AVDD
85 If this field is left empty, interna 85 If this field is left empty, internal reference is selected.
86 $ref: /schemas/types.yaml#/definitions 86 $ref: /schemas/types.yaml#/definitions/uint32
87 enum: [0, 1, 3] 87 enum: [0, 1, 3]
88 88
89 diff-channels: true 89 diff-channels: true
90 90
91 bipolar: true 91 bipolar: true
92 92
93 adi,buffered-positive: 93 adi,buffered-positive:
94 description: Enable buffered mode for 94 description: Enable buffered mode for positive input.
95 type: boolean 95 type: boolean
96 96
97 adi,buffered-negative: 97 adi,buffered-negative:
98 description: Enable buffered mode for 98 description: Enable buffered mode for negative input.
99 type: boolean 99 type: boolean
100 100
101 required: 101 required:
102 - reg 102 - reg
103 - diff-channels 103 - diff-channels
104 104
105 additionalProperties: false 105 additionalProperties: false
106 106
107 allOf: 107 allOf:
108 - $ref: /schemas/spi/spi-peripheral-props.ya 108 - $ref: /schemas/spi/spi-peripheral-props.yaml#
109 109
110 unevaluatedProperties: false 110 unevaluatedProperties: false
111 111
112 examples: 112 examples:
113 - | 113 - |
114 spi { 114 spi {
115 #address-cells = <1>; 115 #address-cells = <1>;
116 #size-cells = <0>; 116 #size-cells = <0>;
117 117
118 adc@0 { 118 adc@0 {
119 compatible = "adi,ad7124-4"; 119 compatible = "adi,ad7124-4";
120 reg = <0>; 120 reg = <0>;
121 spi-max-frequency = <5000000>; 121 spi-max-frequency = <5000000>;
122 interrupts = <25 2>; 122 interrupts = <25 2>;
123 interrupt-parent = <&gpio>; 123 interrupt-parent = <&gpio>;
124 refin1-supply = <&adc_vref>; 124 refin1-supply = <&adc_vref>;
125 clocks = <&ad7124_mclk>; 125 clocks = <&ad7124_mclk>;
126 clock-names = "mclk"; 126 clock-names = "mclk";
127 127
128 #address-cells = <1>; 128 #address-cells = <1>;
129 #size-cells = <0>; 129 #size-cells = <0>;
130 130
131 channel@0 { 131 channel@0 {
132 reg = <0>; 132 reg = <0>;
133 diff-channels = <0 1>; 133 diff-channels = <0 1>;
134 adi,reference-select = <0>; 134 adi,reference-select = <0>;
135 adi,buffered-positive; 135 adi,buffered-positive;
136 }; 136 };
137 137
138 channel@1 { 138 channel@1 {
139 reg = <1>; 139 reg = <1>;
140 bipolar; 140 bipolar;
141 diff-channels = <2 3>; 141 diff-channels = <2 3>;
142 adi,reference-select = <0>; 142 adi,reference-select = <0>;
143 adi,buffered-positive; 143 adi,buffered-positive;
144 adi,buffered-negative; 144 adi,buffered-negative;
145 }; 145 };
146 146
147 channel@2 { 147 channel@2 {
148 reg = <2>; 148 reg = <2>;
149 diff-channels = <4 5>; 149 diff-channels = <4 5>;
150 }; 150 };
151 151
152 channel@3 { 152 channel@3 {
153 reg = <3>; 153 reg = <3>;
154 diff-channels = <6 7>; 154 diff-channels = <6 7>;
155 }; 155 };
156 }; 156 };
157 }; 157 };
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