1 # SPDX-License-Identifier: GPL-2.0 OR BSD-2-Cl 1 # SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause
2 # Copyright 2019 Marcus Folkesson <marcus.folke 2 # Copyright 2019 Marcus Folkesson <marcus.folkesson@gmail.com>
3 %YAML 1.2 3 %YAML 1.2
4 --- 4 ---
5 $id: http://devicetree.org/schemas/iio/adc/mic 5 $id: http://devicetree.org/schemas/iio/adc/microchip,mcp3911.yaml#
6 $schema: http://devicetree.org/meta-schemas/co 6 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 7
8 title: Microchip MCP3911 Dual channel analog f 8 title: Microchip MCP3911 Dual channel analog front end (ADC)
9 9
10 maintainers: 10 maintainers:
11 - Marcus Folkesson <marcus.folkesson@gmail.co 11 - Marcus Folkesson <marcus.folkesson@gmail.com>
12 - Kent Gustavsson <nedo80@gmail.com> 12 - Kent Gustavsson <nedo80@gmail.com>
13 13
14 description: | 14 description: |
15 Bindings for the Microchip MCP3911 Dual chan 15 Bindings for the Microchip MCP3911 Dual channel ADC device. Datasheet can be
16 found here: https://ww1.microchip.com/downlo 16 found here: https://ww1.microchip.com/downloads/en/DeviceDoc/20002286C.pdf
17 17
18 properties: 18 properties:
19 compatible: 19 compatible:
20 enum: 20 enum:
21 - microchip,mcp3910 21 - microchip,mcp3910
22 - microchip,mcp3911 22 - microchip,mcp3911
23 - microchip,mcp3912 23 - microchip,mcp3912
24 - microchip,mcp3913 24 - microchip,mcp3913
25 - microchip,mcp3914 25 - microchip,mcp3914
26 - microchip,mcp3918 26 - microchip,mcp3918
27 - microchip,mcp3919 27 - microchip,mcp3919
28 28
29 reg: 29 reg:
30 maxItems: 1 30 maxItems: 1
31 31
32 spi-max-frequency: 32 spi-max-frequency:
33 maximum: 20000000 33 maximum: 20000000
34 34
35 clocks: 35 clocks:
36 description: | 36 description: |
37 Phandle and clock identifier for externa 37 Phandle and clock identifier for external sampling clock.
38 If not specified, the internal crystal o 38 If not specified, the internal crystal oscillator will be used.
39 maxItems: 1 39 maxItems: 1
40 40
41 interrupts: 41 interrupts:
42 description: IRQ line of the ADC 42 description: IRQ line of the ADC
43 maxItems: 1 43 maxItems: 1
44 44
45 microchip,data-ready-hiz: 45 microchip,data-ready-hiz:
46 description: 46 description:
47 Data Ready Pin Inactive State Control 47 Data Ready Pin Inactive State Control
48 true = The DR pin state is high-impedanc 48 true = The DR pin state is high-impedance
49 false = The DR pin state is logic high 49 false = The DR pin state is logic high
50 type: boolean 50 type: boolean
51 51
52 microchip,device-addr: 52 microchip,device-addr:
53 description: Device address when multiple 53 description: Device address when multiple MCP3911 chips are present on the same SPI bus.
54 $ref: /schemas/types.yaml#/definitions/uin 54 $ref: /schemas/types.yaml#/definitions/uint32
55 enum: [0, 1, 2, 3] 55 enum: [0, 1, 2, 3]
56 default: 0 56 default: 0
57 57
58 vref-supply: 58 vref-supply:
59 description: | 59 description: |
60 Phandle to the external reference voltag 60 Phandle to the external reference voltage supply.
61 If not specified, the internal voltage r 61 If not specified, the internal voltage reference (1.2V) will be used.
62 62
63 required: 63 required:
64 - compatible 64 - compatible
65 - reg 65 - reg
66 66
67 allOf: 67 allOf:
68 - $ref: /schemas/spi/spi-peripheral-props.ya 68 - $ref: /schemas/spi/spi-peripheral-props.yaml#
69 69
70 unevaluatedProperties: false 70 unevaluatedProperties: false
71 71
72 examples: 72 examples:
73 - | 73 - |
74 spi { 74 spi {
75 #address-cells = <1>; 75 #address-cells = <1>;
76 #size-cells = <0>; 76 #size-cells = <0>;
77 77
78 adc@0 { 78 adc@0 {
79 compatible = "microchip,mcp3911"; 79 compatible = "microchip,mcp3911";
80 reg = <0>; 80 reg = <0>;
81 interrupt-parent = <&gpio5>; 81 interrupt-parent = <&gpio5>;
82 interrupts = <15 2>; 82 interrupts = <15 2>;
83 spi-max-frequency = <20000000>; 83 spi-max-frequency = <20000000>;
84 microchip,device-addr = <0>; 84 microchip,device-addr = <0>;
85 vref-supply = <&vref_reg>; 85 vref-supply = <&vref_reg>;
86 clocks = <&xtal>; 86 clocks = <&xtal>;
87 }; 87 };
88 }; 88 };
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