1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-C 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
2 %YAML 1.2 2 %YAML 1.2
3 --- 3 ---
4 $id: http://devicetree.org/schemas/iio/adc/nxp 4 $id: http://devicetree.org/schemas/iio/adc/nxp,imx93-adc.yaml#
5 $schema: http://devicetree.org/meta-schemas/co 5 $schema: http://devicetree.org/meta-schemas/core.yaml#
6 6
7 title: NXP iMX93 ADC 7 title: NXP iMX93 ADC
8 8
9 maintainers: 9 maintainers:
10 - Haibo Chen <haibo.chen@nxp.com> 10 - Haibo Chen <haibo.chen@nxp.com>
11 11
12 description: 12 description:
13 The ADC on iMX93 is a 8-channel 12-bit 1MS/s 13 The ADC on iMX93 is a 8-channel 12-bit 1MS/s ADC with 4 channels
14 connected to pins. it support normal and inj 14 connected to pins. it support normal and inject mode, include
15 One-Shot and Scan (continuous) conversions. 15 One-Shot and Scan (continuous) conversions. Programmable DMA
16 enables for each channel Also this ADC cont 16 enables for each channel Also this ADC contain alternate analog
17 watchdog thresholds, select threshold throug 17 watchdog thresholds, select threshold through input ports. And
18 also has Self-test logic and Software-initia 18 also has Self-test logic and Software-initiated calibration.
19 19
20 properties: 20 properties:
21 compatible: 21 compatible:
22 const: nxp,imx93-adc 22 const: nxp,imx93-adc
23 23
24 reg: 24 reg:
25 maxItems: 1 25 maxItems: 1
26 26
27 interrupts: 27 interrupts:
28 items: 28 items:
29 - description: WDGnL, watchdog threshold 29 - description: WDGnL, watchdog threshold interrupt requests.
30 - description: WDGnH, watchdog threshold 30 - description: WDGnH, watchdog threshold interrupt requests.
31 - description: normal conversion, includ 31 - description: normal conversion, include EOC (End of Conversion),
32 ECH (End of Chain), JEOC (End of Inj 32 ECH (End of Chain), JEOC (End of Injected Conversion) and
33 JECH (End of injected Chain). 33 JECH (End of injected Chain).
34 34
35 clocks: 35 clocks:
36 maxItems: 1 36 maxItems: 1
37 37
38 clock-names: 38 clock-names:
39 const: ipg 39 const: ipg
40 40
41 vref-supply: 41 vref-supply:
42 description: 42 description:
43 The reference voltage which used to esta 43 The reference voltage which used to establish channel scaling.
44 44
45 "#io-channel-cells": 45 "#io-channel-cells":
46 const: 1 46 const: 1
47 47
48 required: 48 required:
49 - compatible 49 - compatible
50 - reg 50 - reg
51 - interrupts 51 - interrupts
52 - clocks 52 - clocks
53 - clock-names 53 - clock-names
54 - vref-supply 54 - vref-supply
55 - "#io-channel-cells" 55 - "#io-channel-cells"
56 56
57 additionalProperties: false 57 additionalProperties: false
58 58
59 examples: 59 examples:
60 - | 60 - |
61 #include <dt-bindings/interrupt-controller 61 #include <dt-bindings/interrupt-controller/irq.h>
62 #include <dt-bindings/clock/imx93-clock.h> 62 #include <dt-bindings/clock/imx93-clock.h>
63 #include <dt-bindings/interrupt-controller 63 #include <dt-bindings/interrupt-controller/arm-gic.h>
64 soc { 64 soc {
65 #address-cells = <1>; 65 #address-cells = <1>;
66 #size-cells = <1>; 66 #size-cells = <1>;
67 adc@44530000 { 67 adc@44530000 {
68 compatible = "nxp,imx93-adc"; 68 compatible = "nxp,imx93-adc";
69 reg = <0x44530000 0x10000>; 69 reg = <0x44530000 0x10000>;
70 interrupts = <GIC_SPI 217 IRQ_TYPE 70 interrupts = <GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH>,
71 <GIC_SPI 218 IRQ_TYPE 71 <GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH>,
72 <GIC_SPI 219 IRQ_TYPE 72 <GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH>;
73 clocks = <&clk IMX93_CLK_ADC1_GATE 73 clocks = <&clk IMX93_CLK_ADC1_GATE>;
74 clock-names = "ipg"; 74 clock-names = "ipg";
75 vref-supply = <®_vref_1v8>; 75 vref-supply = <®_vref_1v8>;
76 #io-channel-cells = <1>; 76 #io-channel-cells = <1>;
77 }; 77 };
78 }; 78 };
79 ... 79 ...
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