1 # SPDX-License-Identifier: (GPL-2.0-only OR BS 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2 %YAML 1.2 2 %YAML 1.2 3 --- 3 --- 4 $id: http://devicetree.org/schemas/iio/dac/adi 4 $id: http://devicetree.org/schemas/iio/dac/adi,axi-dac.yaml# 5 $schema: http://devicetree.org/meta-schemas/co 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 6 6 7 title: Analog Devices AXI DAC IP core 7 title: Analog Devices AXI DAC IP core 8 8 9 maintainers: 9 maintainers: 10 - Nuno Sa <nuno.sa@analog.com> 10 - Nuno Sa <nuno.sa@analog.com> 11 11 12 description: | 12 description: | 13 Analog Devices Generic AXI DAC IP core for i 13 Analog Devices Generic AXI DAC IP core for interfacing a DAC device 14 with a high speed serial (JESD204B/C) or sou 14 with a high speed serial (JESD204B/C) or source synchronous parallel 15 interface (LVDS/CMOS). 15 interface (LVDS/CMOS). 16 Usually, some other interface type (i.e SPI) 16 Usually, some other interface type (i.e SPI) is used as a control 17 interface for the actual DAC, while this IP 17 interface for the actual DAC, while this IP core will interface 18 to the data-lines of the DAC and handle the 18 to the data-lines of the DAC and handle the streaming of data from 19 memory via DMA into the DAC. 19 memory via DMA into the DAC. 20 20 21 https://wiki.analog.com/resources/fpga/docs/ 21 https://wiki.analog.com/resources/fpga/docs/axi_dac_ip 22 22 23 properties: 23 properties: 24 compatible: 24 compatible: 25 enum: 25 enum: 26 - adi,axi-dac-9.1.b 26 - adi,axi-dac-9.1.b 27 27 28 reg: 28 reg: 29 maxItems: 1 29 maxItems: 1 30 30 31 dmas: 31 dmas: 32 maxItems: 1 32 maxItems: 1 33 33 34 dma-names: 34 dma-names: 35 items: 35 items: 36 - const: tx 36 - const: tx 37 37 38 clocks: 38 clocks: 39 maxItems: 1 39 maxItems: 1 40 40 41 '#io-backend-cells': 41 '#io-backend-cells': 42 const: 0 42 const: 0 43 43 44 required: 44 required: 45 - compatible 45 - compatible 46 - dmas 46 - dmas 47 - reg 47 - reg 48 - clocks 48 - clocks 49 49 50 additionalProperties: false 50 additionalProperties: false 51 51 52 examples: 52 examples: 53 - | 53 - | 54 dac@44a00000 { 54 dac@44a00000 { 55 compatible = "adi,axi-dac-9.1.b"; 55 compatible = "adi,axi-dac-9.1.b"; 56 reg = <0x44a00000 0x10000>; 56 reg = <0x44a00000 0x10000>; 57 dmas = <&tx_dma 0>; 57 dmas = <&tx_dma 0>; 58 dma-names = "tx"; 58 dma-names = "tx"; 59 #io-backend-cells = <0>; 59 #io-backend-cells = <0>; 60 clocks = <&axi_clk>; 60 clocks = <&axi_clk>; 61 }; 61 }; 62 ... 62 ...
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