1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-C 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
2 %YAML 1.2 2 %YAML 1.2
3 --- 3 ---
4 $id: http://devicetree.org/schemas/iio/dac/fsl 4 $id: http://devicetree.org/schemas/iio/dac/fsl,vf610-dac.yaml#
5 $schema: http://devicetree.org/meta-schemas/co 5 $schema: http://devicetree.org/meta-schemas/core.yaml#
6 6
7 title: Freescale vf610 Digital to Analog Conve 7 title: Freescale vf610 Digital to Analog Converter
8 8
9 maintainers: 9 maintainers:
10 - Sanchayan Maity <maitysanchayan@gmail.com> 10 - Sanchayan Maity <maitysanchayan@gmail.com>
11 11
12 properties: 12 properties:
13 compatible: 13 compatible:
14 const: fsl,vf610-dac 14 const: fsl,vf610-dac
15 15
16 reg: 16 reg:
17 maxItems: 1 17 maxItems: 1
18 18
19 interrupts: 19 interrupts:
20 maxItems: 1 20 maxItems: 1
21 21
22 clocks: 22 clocks:
23 maxItems: 1 23 maxItems: 1
24 24
25 clock-names: 25 clock-names:
26 const: dac 26 const: dac
27 27
28 required: 28 required:
29 - compatible 29 - compatible
30 - reg 30 - reg
31 - interrupts 31 - interrupts
32 - clocks 32 - clocks
33 - clock-names 33 - clock-names
34 34
35 additionalProperties: false 35 additionalProperties: false
36 36
37 examples: 37 examples:
38 - | 38 - |
39 #include <dt-bindings/interrupt-controller 39 #include <dt-bindings/interrupt-controller/irq.h>
40 #include <dt-bindings/clock/vf610-clock.h> 40 #include <dt-bindings/clock/vf610-clock.h>
41 bus@40000000 { 41 bus@40000000 {
42 compatible = "fsl,aips-bus", "simple-b 42 compatible = "fsl,aips-bus", "simple-bus";
43 reg = <0x40000000 0x00070000>; 43 reg = <0x40000000 0x00070000>;
44 ranges; 44 ranges;
45 #address-cells = <1>; 45 #address-cells = <1>;
46 #size-cells = <1>; 46 #size-cells = <1>;
47 dac@400cc000 { 47 dac@400cc000 {
48 compatible = "fsl,vf610-dac"; 48 compatible = "fsl,vf610-dac";
49 reg = <0x400cc000 0x1000>; 49 reg = <0x400cc000 0x1000>;
50 interrupts = <55 IRQ_TYPE_LEVEL_HI 50 interrupts = <55 IRQ_TYPE_LEVEL_HIGH>;
51 clock-names = "dac"; 51 clock-names = "dac";
52 clocks = <&clks VF610_CLK_DAC0>; 52 clocks = <&clks VF610_CLK_DAC0>;
53 }; 53 };
54 }; 54 };
55 ... 55 ...
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