1 # SPDX-License-Identifier: (GPL-2.0-only OR BS 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2 %YAML 1.2 2 %YAML 1.2
3 --- 3 ---
4 $id: http://devicetree.org/schemas/interrupt-c !! 4 $id: "http://devicetree.org/schemas/interrupt-controller/loongson,liointc.yaml#"
5 $schema: http://devicetree.org/meta-schemas/co !! 5 $schema: "http://devicetree.org/meta-schemas/core.yaml#"
6 6
7 title: Loongson Local I/O Interrupt Controller 7 title: Loongson Local I/O Interrupt Controller
8 8
9 maintainers: 9 maintainers:
10 - Jiaxun Yang <jiaxun.yang@flygoat.com> 10 - Jiaxun Yang <jiaxun.yang@flygoat.com>
11 11
12 description: | 12 description: |
13 This interrupt controller is found in the Lo 13 This interrupt controller is found in the Loongson-3 family of chips and
14 Loongson-2K series chips, as the primary pac !! 14 Loongson-2K1000 chip, as the primary package interrupt controller which
15 can route local I/O interrupt to interrupt l 15 can route local I/O interrupt to interrupt lines of cores.
16 Be aware of the following points. <<
17 1.The Loongson-2K0500 is a single core CPU; <<
18 2.The Loongson-2K0500/2K1000 has 64 device i <<
19 need to define two nodes in dts{i} to desc <<
20 sources respectively. <<
21 16
22 allOf: 17 allOf:
23 - $ref: /schemas/interrupt-controller.yaml# 18 - $ref: /schemas/interrupt-controller.yaml#
24 19
25 properties: 20 properties:
26 compatible: 21 compatible:
27 enum: !! 22 oneOf:
28 - loongson,liointc-1.0 !! 23 - const: loongson,liointc-1.0
29 - loongson,liointc-1.0a !! 24 - const: loongson,liointc-1.0a
30 - loongson,liointc-2.0 !! 25 - const: loongson,liointc-2.0
31 26
32 reg: 27 reg:
33 minItems: 1 28 minItems: 1
34 maxItems: 3 29 maxItems: 3
35 30
36 reg-names: 31 reg-names:
37 items: 32 items:
38 - const: main 33 - const: main
39 - const: isr0 34 - const: isr0
40 - const: isr1 35 - const: isr1
41 minItems: 2 <<
42 36
43 interrupt-controller: true 37 interrupt-controller: true
44 38
45 interrupts: 39 interrupts:
46 description: 40 description:
47 Interrupt source of the CPU interrupts. 41 Interrupt source of the CPU interrupts.
48 minItems: 1 42 minItems: 1
49 maxItems: 4 43 maxItems: 4
50 44
51 interrupt-names: 45 interrupt-names:
52 description: List of names for the parent 46 description: List of names for the parent interrupts.
53 items: 47 items:
54 pattern: int[0-3] !! 48 - const: int0
>> 49 - const: int1
>> 50 - const: int2
>> 51 - const: int3
55 minItems: 1 52 minItems: 1
56 maxItems: 4 53 maxItems: 4
57 54
58 '#interrupt-cells': 55 '#interrupt-cells':
59 const: 2 56 const: 2
60 57
61 loongson,parent_int_map: !! 58 'loongson,parent_int_map':
62 description: | 59 description: |
63 This property points how the children in 60 This property points how the children interrupts will be mapped into CPU
64 interrupt lines. Each cell refers to a p 61 interrupt lines. Each cell refers to a parent interrupt line from 0 to 3
65 and each bit in the cell refers to a chi 62 and each bit in the cell refers to a child interrupt from 0 to 31.
66 If a CPU interrupt line didn't connect w 63 If a CPU interrupt line didn't connect with liointc, then keep its
67 cell with zero. 64 cell with zero.
68 $ref: /schemas/types.yaml#/definitions/uin 65 $ref: /schemas/types.yaml#/definitions/uint32-array
69 minItems: 4 66 minItems: 4
70 maxItems: 4 67 maxItems: 4
71 68
72 required: 69 required:
73 - compatible 70 - compatible
74 - reg 71 - reg
75 - interrupts 72 - interrupts
76 - interrupt-names <<
77 - interrupt-controller 73 - interrupt-controller
78 - '#interrupt-cells' 74 - '#interrupt-cells'
79 - loongson,parent_int_map !! 75 - 'loongson,parent_int_map'
80 76
81 77
82 unevaluatedProperties: false 78 unevaluatedProperties: false
83 79
84 if: 80 if:
85 properties: 81 properties:
86 compatible: 82 compatible:
87 contains: 83 contains:
88 enum: 84 enum:
89 - loongson,liointc-2.0 85 - loongson,liointc-2.0
90 86
91 then: 87 then:
92 properties: 88 properties:
93 reg: 89 reg:
94 minItems: 2 !! 90 minItems: 3
95 maxItems: 3 <<
96 91
97 required: 92 required:
98 - reg-names 93 - reg-names
99 94
100 else: 95 else:
101 properties: 96 properties:
102 reg: 97 reg:
103 maxItems: 1 98 maxItems: 1
104 99
105 examples: 100 examples:
106 - | 101 - |
107 iointc: interrupt-controller@3ff01400 { 102 iointc: interrupt-controller@3ff01400 {
108 compatible = "loongson,liointc-1.0"; 103 compatible = "loongson,liointc-1.0";
109 reg = <0x3ff01400 0x64>; 104 reg = <0x3ff01400 0x64>;
110 105
111 interrupt-controller; 106 interrupt-controller;
112 #interrupt-cells = <2>; 107 #interrupt-cells = <2>;
113 108
114 interrupt-parent = <&cpuintc>; 109 interrupt-parent = <&cpuintc>;
115 interrupts = <2>, <3>; 110 interrupts = <2>, <3>;
116 interrupt-names = "int0", "int1"; 111 interrupt-names = "int0", "int1";
117 112
118 loongson,parent_int_map = <0xf0ffffff>, 113 loongson,parent_int_map = <0xf0ffffff>, /* int0 */
119 <0x0f000000>, 114 <0x0f000000>, /* int1 */
120 <0x00000000>, 115 <0x00000000>, /* int2 */
121 <0x00000000>; 116 <0x00000000>; /* int3 */
122 117
123 }; 118 };
124 119
125 ... 120 ...
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