1 Marvell Armada 7K/8K PIC Interrupt controller 1 Marvell Armada 7K/8K PIC Interrupt controller
2 --------------------------------------------- 2 ---------------------------------------------
3 3
4 This is the Device Tree binding for the PIC, a 4 This is the Device Tree binding for the PIC, a secondary interrupt
5 controller available on the Marvell Armada 7K/ 5 controller available on the Marvell Armada 7K/8K ARM64 SoCs, and
6 typically connected to the GIC as the primary 6 typically connected to the GIC as the primary interrupt controller.
7 7
8 Required properties: 8 Required properties:
9 - compatible: should be "marvell,armada-8k-pic 9 - compatible: should be "marvell,armada-8k-pic"
10 - interrupt-controller: identifies the node as 10 - interrupt-controller: identifies the node as an interrupt controller
11 - #interrupt-cells: the number of cells to def 11 - #interrupt-cells: the number of cells to define interrupts on this
12 controller. Should be 1 12 controller. Should be 1
13 - reg: the register area for the PIC interrupt 13 - reg: the register area for the PIC interrupt controller
14 - interrupts: the interrupt to the primary int 14 - interrupts: the interrupt to the primary interrupt controller,
15 typically the GIC 15 typically the GIC
16 16
17 Example: 17 Example:
18 18
19 pic: interrupt-controller@3f0100 { 19 pic: interrupt-controller@3f0100 {
20 compatible = "marvell,armada-8 20 compatible = "marvell,armada-8k-pic";
21 reg = <0x3f0100 0x10>; 21 reg = <0x3f0100 0x10>;
22 #interrupt-cells = <1>; 22 #interrupt-cells = <1>;
23 interrupt-controller; 23 interrupt-controller;
24 interrupts = <GIC_PPI 15 IRQ_T 24 interrupts = <GIC_PPI 15 IRQ_TYPE_LEVEL_HIGH>;
25 }; 25 };
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