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Linux/Documentation/devicetree/bindings/interrupt-controller/marvell,odmi-controller.txt

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Diff markup

Differences between /Documentation/devicetree/bindings/interrupt-controller/marvell,odmi-controller.txt (Version linux-6.12-rc7) and /Documentation/devicetree/bindings/interrupt-controller/marvell,odmi-controller.txt (Version linux-4.18.20)


  1                                                     1 
  2 * Marvell ODMI for MSI support                      2 * Marvell ODMI for MSI support
  3                                                     3 
  4 Some Marvell SoCs have an On-Die Message Inter      4 Some Marvell SoCs have an On-Die Message Interrupt (ODMI) controller
  5 which can be used by on-board peripheral for M      5 which can be used by on-board peripheral for MSI interrupts.
  6                                                     6 
  7 Required properties:                                7 Required properties:
  8                                                     8 
  9 - compatible           : The value here should      9 - compatible           : The value here should contain:
 10                                                    10 
 11     "marvell,ap806-odmi-controller", "marvell,     11     "marvell,ap806-odmi-controller", "marvell,odmi-controller".
 12                                                    12 
 13 - interrupt,controller : Identifies the node a     13 - interrupt,controller : Identifies the node as an interrupt controller.
 14                                                    14 
 15 - msi-controller       : Identifies the node a     15 - msi-controller       : Identifies the node as an MSI controller.
 16                                                    16 
 17 - marvell,odmi-frames  : Number of ODMI frames     17 - marvell,odmi-frames  : Number of ODMI frames available. Each frame
 18                          provides a number of      18                          provides a number of events.
 19                                                    19 
 20 - reg                  : List of register defi     20 - reg                  : List of register definitions, one for each
 21                          ODMI frame.               21                          ODMI frame.
 22                                                    22 
 23 - marvell,spi-base     : List of GIC base SPI      23 - marvell,spi-base     : List of GIC base SPI interrupts, one for each
 24                          ODMI frame. Those SPI     24                          ODMI frame. Those SPI interrupts are 0-based,
 25                          i.e marvell,spi-base      25                          i.e marvell,spi-base = <128> will use SPI #96.
 26                          See Documentation/dev !!  26                          See Documentation/devicetree/bindings/interrupt-controller/arm,gic.txt
 27                          for details about the     27                          for details about the GIC Device Tree binding.
                                                   >>  28 
                                                   >>  29 - interrupt-parent     : Reference to the parent interrupt controller.
 28                                                    30 
 29 Example:                                           31 Example:
 30                                                    32 
 31         odmi: odmi@300000 {                        33         odmi: odmi@300000 {
 32                 compatible = "marvell,ap806-od     34                 compatible = "marvell,ap806-odmi-controller",
 33                              "marvell,odmi-con     35                              "marvell,odmi-controller";
 34                 interrupt-controller;              36                 interrupt-controller;
 35                 msi-controller;                    37                 msi-controller;
 36                 marvell,odmi-frames = <4>;         38                 marvell,odmi-frames = <4>;
 37                 reg = <0x300000 0x4000>,           39                 reg = <0x300000 0x4000>,
 38                       <0x304000 0x4000>,           40                       <0x304000 0x4000>,
 39                       <0x308000 0x4000>,           41                       <0x308000 0x4000>,
 40                       <0x30C000 0x4000>;           42                       <0x30C000 0x4000>;
 41                 marvell,spi-base = <128>, <136     43                 marvell,spi-base = <128>, <136>, <144>, <152>;
 42         };                                         44         };
                                                      

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