1 # SPDX-License-Identifier: GPL-2.0-only 1 # SPDX-License-Identifier: GPL-2.0-only 2 %YAML 1.2 2 %YAML 1.2 3 --- 3 --- 4 $id: http://devicetree.org/schemas/interrupt-c 4 $id: http://devicetree.org/schemas/interrupt-controller/mrvl,intc.yaml# 5 $schema: http://devicetree.org/meta-schemas/co 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 6 6 7 title: Marvell MMP/Orion Interrupt controller !! 7 title: Marvell MMP/Orion Interrupt controller bindings 8 8 9 maintainers: 9 maintainers: 10 - Andrew Lunn <andrew@lunn.ch> !! 10 - Thomas Gleixner <tglx@linutronix.de> 11 - Gregory Clement <gregory.clement@bootlin.co !! 11 - Jason Cooper <jason@lakedaemon.net> >> 12 - Marc Zyngier <maz@kernel.org> >> 13 - Rob Herring <robh+dt@kernel.org> 12 14 13 allOf: 15 allOf: 14 - if: 16 - if: 15 properties: 17 properties: 16 compatible: 18 compatible: 17 not: 19 not: 18 contains: 20 contains: 19 const: marvell,orion-intc 21 const: marvell,orion-intc 20 then: 22 then: 21 required: 23 required: 22 - mrvl,intc-nr-irqs 24 - mrvl,intc-nr-irqs 23 - if: 25 - if: 24 properties: 26 properties: 25 compatible: 27 compatible: 26 contains: 28 contains: 27 enum: 29 enum: 28 - mrvl,mmp-intc 30 - mrvl,mmp-intc 29 - mrvl,mmp2-intc 31 - mrvl,mmp2-intc 30 then: 32 then: 31 properties: 33 properties: 32 reg: 34 reg: 33 maxItems: 1 35 maxItems: 1 34 - if: 36 - if: 35 properties: 37 properties: 36 compatible: 38 compatible: 37 contains: 39 contains: 38 enum: 40 enum: 39 - marvell,mmp3-intc 41 - marvell,mmp3-intc 40 - mrvl,mmp2-mux-intc 42 - mrvl,mmp2-mux-intc 41 then: 43 then: 42 properties: 44 properties: 43 reg: 45 reg: 44 minItems: 2 46 minItems: 2 45 - if: 47 - if: 46 properties: 48 properties: 47 compatible: 49 compatible: 48 contains: 50 contains: 49 const: mrvl,mmp2-mux-intc 51 const: mrvl,mmp2-mux-intc 50 then: 52 then: 51 properties: 53 properties: 52 interrupts: 54 interrupts: 53 maxItems: 1 55 maxItems: 1 54 reg-names: 56 reg-names: 55 items: 57 items: 56 - const: mux status !! 58 - const: 'mux status' 57 - const: mux mask !! 59 - const: 'mux mask' 58 required: 60 required: 59 - interrupts 61 - interrupts 60 else: 62 else: 61 properties: 63 properties: 62 interrupts: false 64 interrupts: false 63 65 64 properties: 66 properties: 65 '#interrupt-cells': 67 '#interrupt-cells': 66 const: 1 68 const: 1 67 69 68 compatible: 70 compatible: 69 enum: 71 enum: 70 - mrvl,mmp-intc 72 - mrvl,mmp-intc 71 - mrvl,mmp2-intc 73 - mrvl,mmp2-intc 72 - marvell,mmp3-intc 74 - marvell,mmp3-intc 73 - marvell,orion-intc 75 - marvell,orion-intc 74 - mrvl,mmp2-mux-intc 76 - mrvl,mmp2-mux-intc 75 77 76 reg: 78 reg: 77 minItems: 1 79 minItems: 1 78 maxItems: 2 80 maxItems: 2 79 81 80 reg-names: true 82 reg-names: true 81 83 82 interrupts: true 84 interrupts: true 83 85 84 interrupt-controller: true 86 interrupt-controller: true 85 87 86 mrvl,intc-nr-irqs: 88 mrvl,intc-nr-irqs: 87 description: | 89 description: | 88 Specifies the number of interrupts in th 90 Specifies the number of interrupts in the interrupt controller. 89 $ref: /schemas/types.yaml#/definitions/uin 91 $ref: /schemas/types.yaml#/definitions/uint32 90 92 91 mrvl,clr-mfp-irq: 93 mrvl,clr-mfp-irq: 92 description: | 94 description: | 93 Specifies the interrupt that needs to cl 95 Specifies the interrupt that needs to clear MFP edge detection first. 94 $ref: /schemas/types.yaml#/definitions/uin 96 $ref: /schemas/types.yaml#/definitions/uint32 95 97 96 required: 98 required: 97 - '#interrupt-cells' 99 - '#interrupt-cells' 98 - compatible 100 - compatible 99 - reg 101 - reg 100 - interrupt-controller 102 - interrupt-controller 101 103 102 additionalProperties: false 104 additionalProperties: false 103 105 104 examples: 106 examples: 105 - | 107 - | 106 interrupt-controller@d4282000 { 108 interrupt-controller@d4282000 { 107 compatible = "mrvl,mmp2-intc"; 109 compatible = "mrvl,mmp2-intc"; 108 interrupt-controller; 110 interrupt-controller; 109 #interrupt-cells = <1>; 111 #interrupt-cells = <1>; 110 reg = <0xd4282000 0x1000>; 112 reg = <0xd4282000 0x1000>; 111 mrvl,intc-nr-irqs = <64>; 113 mrvl,intc-nr-irqs = <64>; 112 }; 114 }; 113 115 114 interrupt-controller@d4282150 { 116 interrupt-controller@d4282150 { 115 compatible = "mrvl,mmp2-mux-intc"; 117 compatible = "mrvl,mmp2-mux-intc"; 116 interrupts = <4>; 118 interrupts = <4>; 117 interrupt-controller; 119 interrupt-controller; 118 #interrupt-cells = <1>; 120 #interrupt-cells = <1>; 119 reg = <0x150 0x4>, <0x168 0x4>; 121 reg = <0x150 0x4>, <0x168 0x4>; 120 reg-names = "mux status", "mux mask"; 122 reg-names = "mux status", "mux mask"; 121 mrvl,intc-nr-irqs = <2>; 123 mrvl,intc-nr-irqs = <2>; 122 }; 124 }; 123 - | 125 - | 124 interrupt-controller@fed20204 { 126 interrupt-controller@fed20204 { 125 compatible = "marvell,orion-intc"; 127 compatible = "marvell,orion-intc"; 126 interrupt-controller; 128 interrupt-controller; 127 #interrupt-cells = <1>; 129 #interrupt-cells = <1>; 128 reg = <0xfed20204 0x04>, 130 reg = <0xfed20204 0x04>, 129 <0xfed20214 0x04>; 131 <0xfed20214 0x04>; 130 }; 132 }; 131 133 132 ... 134 ...
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