1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-C
2 %YAML 1.2
3 ---
4 $id: http://devicetree.org/schemas/interrupt-c
5 $schema: http://devicetree.org/meta-schemas/co
6
7 title: Texas Instruments K3 Interrupt Aggregat
8
9 maintainers:
10 - Lokesh Vutla <lokeshvutla@ti.com>
11
12 allOf:
13 - $ref: /schemas/arm/keystone/ti,k3-sci-comm
14
15 description: |
16 The Interrupt Aggregator (INTA) provides a c
17 which handles the termination of system even
18 be coherently processed by the host(s) in th
19 of 64 events can be mapped to a single inter
20
21 Interrupt Aggr
22 +----------------------
23 | Intmap
24 | +--------------+ +--
25 m ------>| | vint | bit | | 0
26 . | +--------------+ +--
27 . | .
28 Globalevents ------>| .
29 . | .
30 . | .
31 n ------>| +--------------+ +--
32 | | vint | bit | | 0
33 | +--------------+ +--
34 |
35 | Unmap
36 | +--------------+
37 Unmapped events ---->| | umapidx |-----
38 | +--------------+
39 |
40 +----------------------
41
42 Configuration of these Intmap registers that
43 done by a system controller (like the Device
44 on AM654 SoC). Driver should request the sys
45 of global events and vints assigned to the r
46 of these requested resources should be handl
47 system controller to map specific global eve
48
49 Communication between the host processor run
50 controller happens through a protocol called
51 (TISCI protocol).
52
53 properties:
54 compatible:
55 const: ti,sci-inta
56
57 reg:
58 maxItems: 1
59
60 interrupt-controller: true
61
62 '#interrupt-cells':
63 const: 0
64
65 msi-controller: true
66
67 ti,interrupt-ranges:
68 $ref: /schemas/types.yaml#/definitions/uin
69 description: |
70 Interrupt ranges that converts the INTA
71 to parents's input interrupt numbers.
72 items:
73 items:
74 - description: |
75 "output_irq" specifies the base fo
76 - description: |
77 "parent's input irq" specifies the
78 - description: |
79 "limit" specifies the limit for tr
80
81 ti,unmapped-event-sources:
82 $ref: /schemas/types.yaml#/definitions/pha
83 items:
84 maxItems: 1
85 description:
86 Array of phandles to DMA controllers whe
87
88 power-domains:
89 maxItems: 1
90
91 required:
92 - compatible
93 - reg
94 - interrupt-controller
95 - msi-controller
96 - ti,sci
97 - ti,sci-dev-id
98 - ti,interrupt-ranges
99
100 unevaluatedProperties: false
101
102 examples:
103 - |
104 bus {
105 #address-cells = <2>;
106 #size-cells = <2>;
107
108 main_udmass_inta: msi-controller@33d00
109 compatible = "ti,sci-inta";
110 reg = <0x0 0x33d00000 0x0 0x100000
111 interrupt-controller;
112 msi-controller;
113 interrupt-parent = <&main_navss_in
114 ti,sci = <&dmsc>;
115 ti,sci-dev-id = <179>;
116 ti,interrupt-ranges = <0 0 256>;
117 };
118 };
Linux® is a registered trademark of Linus Torvalds in the United States and other countries.
TOMOYO® is a registered trademark of NTT DATA CORPORATION.