1 # SPDX-License-Identifier: GPL-2.0-only 2 %YAML 1.2 3 --- 4 $id: http://devicetree.org/schemas/iommu/rockc 5 $schema: http://devicetree.org/meta-schemas/co 6 7 title: Rockchip IOMMU 8 9 maintainers: 10 - Heiko Stuebner <heiko@sntech.de> 11 12 description: |+ 13 A Rockchip DRM iommu translates io virtual a 14 its master device. Each slave device is boun 15 shares its clocks, power domain and irq. 16 17 For information on assigning IOMMU controlle 18 see generic IOMMU bindings. 19 20 properties: 21 compatible: 22 oneOf: 23 - enum: 24 - rockchip,iommu 25 - rockchip,rk3568-iommu 26 - items: 27 - enum: 28 - rockchip,rk3588-iommu 29 - const: rockchip,rk3568-iommu 30 31 reg: 32 items: 33 - description: configuration registers f 34 - description: configuration registers f 35 minItems: 1 36 37 interrupts: 38 items: 39 - description: interruption for MMU inst 40 - description: interruption for MMU inst 41 minItems: 1 42 43 clocks: 44 items: 45 - description: Core clock 46 - description: Interface clock 47 48 clock-names: 49 items: 50 - const: aclk 51 - const: iface 52 53 "#iommu-cells": 54 const: 0 55 56 power-domains: 57 maxItems: 1 58 59 rockchip,disable-mmu-reset: 60 $ref: /schemas/types.yaml#/definitions/fla 61 description: | 62 Do not use the mmu reset operation. 63 Some mmu instances may produce unexpecte 64 when the reset operation is used. 65 66 required: 67 - compatible 68 - reg 69 - interrupts 70 - clocks 71 - clock-names 72 - "#iommu-cells" 73 74 additionalProperties: false 75 76 examples: 77 - | 78 #include <dt-bindings/clock/rk3399-cru.h> 79 #include <dt-bindings/interrupt-controller 80 81 vopl_mmu: iommu@ff940300 { 82 compatible = "rockchip,iommu"; 83 reg = <0xff940300 0x100>; 84 interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_ 85 clocks = <&cru ACLK_VOP1>, <&cru HCLK_VO 86 clock-names = "aclk", "iface"; 87 #iommu-cells = <0>; 88 };
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