1 # SPDX-License-Identifier: (GPL-2.0-only OR BS 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2 # Copyright 2020 Unisoc Inc. 2 # Copyright 2020 Unisoc Inc.
3 %YAML 1.2 3 %YAML 1.2
4 --- 4 ---
5 $id: http://devicetree.org/schemas/iommu/sprd, 5 $id: http://devicetree.org/schemas/iommu/sprd,iommu.yaml#
6 $schema: http://devicetree.org/meta-schemas/co 6 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 7
8 title: Unisoc IOMMU and Multi-media MMU 8 title: Unisoc IOMMU and Multi-media MMU
9 9
10 maintainers: 10 maintainers:
11 - Chunyan Zhang <zhang.lyra@gmail.com> 11 - Chunyan Zhang <zhang.lyra@gmail.com>
12 12
13 properties: 13 properties:
14 compatible: 14 compatible:
15 enum: 15 enum:
16 - sprd,iommu-v1 16 - sprd,iommu-v1
17 17
18 "#iommu-cells": 18 "#iommu-cells":
19 const: 0 19 const: 0
20 description: 20 description:
21 Unisoc IOMMUs are all single-master IOMM 21 Unisoc IOMMUs are all single-master IOMMU devices, therefore no
22 additional information needs to associat 22 additional information needs to associate with its master device.
23 Please refer to the generic bindings doc 23 Please refer to the generic bindings document for more details,
24 Documentation/devicetree/bindings/iommu/ 24 Documentation/devicetree/bindings/iommu/iommu.txt
25 25
26 reg: 26 reg:
27 maxItems: 1 27 maxItems: 1
28 28
29 clocks: 29 clocks:
30 description: 30 description:
31 Reference to a gate clock phandle, since 31 Reference to a gate clock phandle, since access to some of IOMMUs are
32 controlled by gate clock, but this is no 32 controlled by gate clock, but this is not required.
33 33
34 required: 34 required:
35 - compatible 35 - compatible
36 - reg 36 - reg
37 - "#iommu-cells" 37 - "#iommu-cells"
38 38
39 additionalProperties: false 39 additionalProperties: false
40 40
41 examples: 41 examples:
42 - | 42 - |
43 iommu_disp: iommu@63000800 { 43 iommu_disp: iommu@63000800 {
44 compatible = "sprd,iommu-v1"; 44 compatible = "sprd,iommu-v1";
45 reg = <0x63000800 0x80>; 45 reg = <0x63000800 0x80>;
46 #iommu-cells = <0>; 46 #iommu-cells = <0>;
47 }; 47 };
48 48
49 - | 49 - |
50 iommu_jpg: iommu@62300300 { 50 iommu_jpg: iommu@62300300 {
51 compatible = "sprd,iommu-v1"; 51 compatible = "sprd,iommu-v1";
52 reg = <0x62300300 0x80>; 52 reg = <0x62300300 0x80>;
53 #iommu-cells = <0>; 53 #iommu-cells = <0>;
54 clocks = <&mm_gate 1>; 54 clocks = <&mm_gate 1>;
55 }; 55 };
56 56
57 ... 57 ...
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