1 # SPDX-License-Identifier: (GPL-2.0-only OR BS 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2 %YAML 1.2 2 %YAML 1.2
3 --- 3 ---
4 $id: http://devicetree.org/schemas/mailbox/mtk 4 $id: http://devicetree.org/schemas/mailbox/mtk,adsp-mbox.yaml#
5 $schema: http://devicetree.org/meta-schemas/co 5 $schema: http://devicetree.org/meta-schemas/core.yaml#
6 6
7 title: Mediatek ADSP mailbox 7 title: Mediatek ADSP mailbox
8 8
9 maintainers: 9 maintainers:
10 - Allen-KH Cheng <Allen-KH.Cheng@mediatek.com 10 - Allen-KH Cheng <Allen-KH.Cheng@mediatek.com>
11 11
12 description: | 12 description: |
13 The MTK ADSP mailbox Inter-Processor Communi 13 The MTK ADSP mailbox Inter-Processor Communication (IPC) enables the SoC
14 to communicate with ADSP by passing messages 14 to communicate with ADSP by passing messages through two mailbox channels.
15 The MTK ADSP mailbox IPC also provides the a 15 The MTK ADSP mailbox IPC also provides the ability for one processor to
16 signal the other processor using interrupts. 16 signal the other processor using interrupts.
17 17
18 properties: 18 properties:
19 compatible: 19 compatible:
20 oneOf: !! 20 enum:
21 - enum: !! 21 - mediatek,mt8195-adsp-mbox
22 - mediatek,mt8186-adsp-mbox !! 22 - mediatek,mt8186-adsp-mbox
23 - mediatek,mt8195-adsp-mbox <<
24 - items: <<
25 - enum: <<
26 - mediatek,mt8188-adsp-mbox <<
27 - const: mediatek,mt8186-adsp-mbox <<
28 <<
29 23
30 "#mbox-cells": 24 "#mbox-cells":
31 const: 0 25 const: 0
32 26
33 reg: 27 reg:
34 maxItems: 1 28 maxItems: 1
35 29
36 interrupts: 30 interrupts:
37 maxItems: 1 31 maxItems: 1
38 32
39 required: 33 required:
40 - compatible 34 - compatible
41 - "#mbox-cells" 35 - "#mbox-cells"
42 - reg 36 - reg
43 - interrupts 37 - interrupts
44 38
45 additionalProperties: false 39 additionalProperties: false
46 40
47 examples: 41 examples:
48 - | 42 - |
49 #include <dt-bindings/interrupt-controller 43 #include <dt-bindings/interrupt-controller/arm-gic.h>
50 #include <dt-bindings/interrupt-controller 44 #include <dt-bindings/interrupt-controller/irq.h>
51 45
52 adsp_mailbox0:mailbox@10816000 { 46 adsp_mailbox0:mailbox@10816000 {
53 compatible = "mediatek,mt8195-adsp-mbo 47 compatible = "mediatek,mt8195-adsp-mbox";
54 #mbox-cells = <0>; 48 #mbox-cells = <0>;
55 reg = <0x10816000 0x1000>; 49 reg = <0x10816000 0x1000>;
56 interrupts = <GIC_SPI 702 IRQ_TYPE_LEV 50 interrupts = <GIC_SPI 702 IRQ_TYPE_LEVEL_HIGH 0>;
57 }; 51 };
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