1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-C 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
2 %YAML 1.2 2 %YAML 1.2
3 --- 3 ---
4 $id: http://devicetree.org/schemas/mailbox/st, !! 4 $id: "http://devicetree.org/schemas/mailbox/st,stm32-ipcc.yaml#"
5 $schema: http://devicetree.org/meta-schemas/co !! 5 $schema: "http://devicetree.org/meta-schemas/core.yaml#"
6 6
7 title: STMicroelectronics STM32 IPC controller !! 7 title: STMicroelectronics STM32 IPC controller bindings
8 8
9 description: 9 description:
10 The IPCC block provides a non blocking signa 10 The IPCC block provides a non blocking signaling mechanism to post and
11 retrieve messages in an atomic way between t 11 retrieve messages in an atomic way between two processors.
12 It provides the signaling for N bidirectionn 12 It provides the signaling for N bidirectionnal channels. The number of
13 channels (N) can be read from a dedicated re 13 channels (N) can be read from a dedicated register.
14 14
15 maintainers: 15 maintainers:
16 - Fabien Dessenne <fabien.dessenne@foss.st.co !! 16 - Fabien Dessenne <fabien.dessenne@st.com>
17 - Arnaud Pouliquen <arnaud.pouliquen@foss.st. !! 17 - Arnaud Pouliquen <arnaud.pouliquen@st.com>
18 18
19 properties: 19 properties:
20 compatible: 20 compatible:
21 const: st,stm32mp1-ipcc 21 const: st,stm32mp1-ipcc
22 22
23 reg: 23 reg:
24 maxItems: 1 24 maxItems: 1
25 25
26 clocks: 26 clocks:
27 maxItems: 1 27 maxItems: 1
28 28
29 interrupts: 29 interrupts:
30 items: 30 items:
31 - description: rx channel occupied 31 - description: rx channel occupied
32 - description: tx channel free 32 - description: tx channel free
>> 33 - description: wakeup source
>> 34 minItems: 2
33 35
34 interrupt-names: 36 interrupt-names:
35 items: 37 items:
36 - const: rx 38 - const: rx
37 - const: tx 39 - const: tx
>> 40 - const: wakeup
>> 41 minItems: 2
38 42
39 wakeup-source: true 43 wakeup-source: true
40 44
41 "#mbox-cells": 45 "#mbox-cells":
42 const: 1 46 const: 1
43 47
44 st,proc-id: 48 st,proc-id:
45 description: Processor id using the mailbo 49 description: Processor id using the mailbox (0 or 1)
46 $ref: /schemas/types.yaml#/definitions/uin 50 $ref: /schemas/types.yaml#/definitions/uint32
47 enum: [0, 1] 51 enum: [0, 1]
48 52
49 required: 53 required:
50 - compatible 54 - compatible
51 - reg 55 - reg
52 - st,proc-id 56 - st,proc-id
53 - clocks 57 - clocks
54 - interrupt-names 58 - interrupt-names
55 - "#mbox-cells" 59 - "#mbox-cells"
56 - interrupts 60 - interrupts
57 61
58 additionalProperties: false 62 additionalProperties: false
59 63
60 examples: 64 examples:
61 - | 65 - |
62 #include <dt-bindings/interrupt-controller 66 #include <dt-bindings/interrupt-controller/arm-gic.h>
63 #include <dt-bindings/clock/stm32mp1-clks. 67 #include <dt-bindings/clock/stm32mp1-clks.h>
64 ipcc: mailbox@4c001000 { 68 ipcc: mailbox@4c001000 {
65 compatible = "st,stm32mp1-ipcc"; 69 compatible = "st,stm32mp1-ipcc";
66 #mbox-cells = <1>; 70 #mbox-cells = <1>;
67 reg = <0x4c001000 0x400>; 71 reg = <0x4c001000 0x400>;
68 st,proc-id = <0>; 72 st,proc-id = <0>;
69 interrupts-extended = <&exti 61 1>, !! 73 interrupts-extended = <&intc GIC_SPI 100 IRQ_TYPE_NONE>,
70 <&intc GIC_SPI 101 !! 74 <&intc GIC_SPI 101 IRQ_TYPE_NONE>,
71 interrupt-names = "rx", "tx"; !! 75 <&aiec 62 1>;
>> 76 interrupt-names = "rx", "tx", "wakeup";
72 clocks = <&rcc_clk IPCC>; 77 clocks = <&rcc_clk IPCC>;
73 wakeup-source; 78 wakeup-source;
74 }; 79 };
75 80
76 ... 81 ...
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