1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-C 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
2 %YAML 1.2 2 %YAML 1.2
3 --- 3 ---
4 $id: http://devicetree.org/schemas/media/allwi 4 $id: http://devicetree.org/schemas/media/allwinner,sun8i-h3-deinterlace.yaml#
5 $schema: http://devicetree.org/meta-schemas/co 5 $schema: http://devicetree.org/meta-schemas/core.yaml#
6 6
7 title: Allwinner H3 Deinterlace !! 7 title: Allwinner H3 Deinterlace Device Tree Bindings
8 8
9 maintainers: 9 maintainers:
10 - Jernej Skrabec <jernej.skrabec@siol.net> 10 - Jernej Skrabec <jernej.skrabec@siol.net>
11 - Chen-Yu Tsai <wens@csie.org> 11 - Chen-Yu Tsai <wens@csie.org>
12 - Maxime Ripard <mripard@kernel.org> 12 - Maxime Ripard <mripard@kernel.org>
13 13
14 description: |- 14 description: |-
15 The Allwinner H3 and later has a deinterlace 15 The Allwinner H3 and later has a deinterlace core used for
16 deinterlacing interlaced video content. 16 deinterlacing interlaced video content.
17 17
18 properties: 18 properties:
19 compatible: 19 compatible:
20 oneOf: 20 oneOf:
21 - const: allwinner,sun8i-h3-deinterlace 21 - const: allwinner,sun8i-h3-deinterlace
22 - items: 22 - items:
23 - const: allwinner,sun8i-r40-deinter 23 - const: allwinner,sun8i-r40-deinterlace
24 - const: allwinner,sun8i-h3-deinterl 24 - const: allwinner,sun8i-h3-deinterlace
25 - items: 25 - items:
26 - const: allwinner,sun50i-a64-deinte 26 - const: allwinner,sun50i-a64-deinterlace
27 - const: allwinner,sun8i-h3-deinterl 27 - const: allwinner,sun8i-h3-deinterlace
28 28
29 reg: 29 reg:
30 maxItems: 1 30 maxItems: 1
31 31
32 interrupts: 32 interrupts:
33 maxItems: 1 33 maxItems: 1
34 34
35 clocks: 35 clocks:
36 items: 36 items:
37 - description: Deinterlace interface clo 37 - description: Deinterlace interface clock
38 - description: Deinterlace module clock 38 - description: Deinterlace module clock
39 - description: Deinterlace DRAM clock 39 - description: Deinterlace DRAM clock
40 40
41 clock-names: 41 clock-names:
42 items: 42 items:
43 - const: bus 43 - const: bus
44 - const: mod 44 - const: mod
45 - const: ram 45 - const: ram
46 46
47 resets: 47 resets:
48 maxItems: 1 48 maxItems: 1
49 49
50 interconnects: 50 interconnects:
51 maxItems: 1 51 maxItems: 1
52 52
53 interconnect-names: 53 interconnect-names:
54 const: dma-mem 54 const: dma-mem
55 55
56 required: 56 required:
57 - compatible 57 - compatible
58 - reg 58 - reg
59 - interrupts 59 - interrupts
60 - clocks 60 - clocks
61 61
62 additionalProperties: false 62 additionalProperties: false
63 63
64 examples: 64 examples:
65 - | 65 - |
66 #include <dt-bindings/interrupt-controller 66 #include <dt-bindings/interrupt-controller/arm-gic.h>
67 #include <dt-bindings/clock/sun8i-h3-ccu.h 67 #include <dt-bindings/clock/sun8i-h3-ccu.h>
68 #include <dt-bindings/reset/sun8i-h3-ccu.h 68 #include <dt-bindings/reset/sun8i-h3-ccu.h>
69 69
70 deinterlace: deinterlace@1400000 { 70 deinterlace: deinterlace@1400000 {
71 compatible = "allwinner,sun8i-h3-deint 71 compatible = "allwinner,sun8i-h3-deinterlace";
72 reg = <0x01400000 0x20000>; 72 reg = <0x01400000 0x20000>;
73 clocks = <&ccu CLK_BUS_DEINTERLACE>, 73 clocks = <&ccu CLK_BUS_DEINTERLACE>,
74 <&ccu CLK_DEINTERLACE>, 74 <&ccu CLK_DEINTERLACE>,
75 <&ccu CLK_DRAM_DEINTERLACE>; 75 <&ccu CLK_DRAM_DEINTERLACE>;
76 clock-names = "bus", "mod", "ram"; 76 clock-names = "bus", "mod", "ram";
77 resets = <&ccu RST_BUS_DEINTERLACE>; 77 resets = <&ccu RST_BUS_DEINTERLACE>;
78 interrupts = <GIC_SPI 93 IRQ_TYPE_LEVE 78 interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>;
79 interconnects = <&mbus 9>; 79 interconnects = <&mbus 9>;
80 interconnect-names = "dma-mem"; 80 interconnect-names = "dma-mem";
81 }; 81 };
82 82
83 ... 83 ...
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