1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-C 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
2 %YAML 1.2 2 %YAML 1.2
3 --- 3 ---
4 $id: http://devicetree.org/schemas/media/media 4 $id: http://devicetree.org/schemas/media/mediatek-jpeg-encoder.yaml#
5 $schema: http://devicetree.org/meta-schemas/co 5 $schema: http://devicetree.org/meta-schemas/core.yaml#
6 6
7 title: MediaTek JPEG Encoder 7 title: MediaTek JPEG Encoder
8 8
9 maintainers: 9 maintainers:
10 - Xia Jiang <xia.jiang@mediatek.com> 10 - Xia Jiang <xia.jiang@mediatek.com>
11 11
12 description: |- 12 description: |-
13 MediaTek JPEG Encoder is the JPEG encode har 13 MediaTek JPEG Encoder is the JPEG encode hardware present in MediaTek SoCs
14 14
15 properties: 15 properties:
16 compatible: 16 compatible:
17 items: 17 items:
18 - enum: 18 - enum:
19 - mediatek,mt2701-jpgenc 19 - mediatek,mt2701-jpgenc
20 - mediatek,mt8183-jpgenc 20 - mediatek,mt8183-jpgenc
21 - mediatek,mt8186-jpgenc 21 - mediatek,mt8186-jpgenc
22 - mediatek,mt8188-jpgenc 22 - mediatek,mt8188-jpgenc
23 - const: mediatek,mtk-jpgenc 23 - const: mediatek,mtk-jpgenc
24 reg: 24 reg:
25 maxItems: 1 25 maxItems: 1
26 26
27 interrupts: 27 interrupts:
28 maxItems: 1 28 maxItems: 1
29 29
30 clocks: 30 clocks:
31 maxItems: 1 31 maxItems: 1
32 32
33 clock-names: 33 clock-names:
34 items: 34 items:
35 - const: jpgenc 35 - const: jpgenc
36 36
37 power-domains: 37 power-domains:
38 maxItems: 1 38 maxItems: 1
39 39
40 iommus: 40 iommus:
41 minItems: 2 41 minItems: 2
42 maxItems: 4 42 maxItems: 4
43 description: | 43 description: |
44 Points to the respective IOMMU block wit 44 Points to the respective IOMMU block with master port as argument, see
45 Documentation/devicetree/bindings/iommu/ 45 Documentation/devicetree/bindings/iommu/mediatek,iommu.yaml for details.
46 Ports are according to the HW. 46 Ports are according to the HW.
47 47
48 required: 48 required:
49 - compatible 49 - compatible
50 - reg 50 - reg
51 - interrupts 51 - interrupts
52 - clocks 52 - clocks
53 - clock-names 53 - clock-names
54 - power-domains 54 - power-domains
55 - iommus 55 - iommus
56 56
57 additionalProperties: false 57 additionalProperties: false
58 58
59 examples: 59 examples:
60 - | 60 - |
61 #include <dt-bindings/clock/mt2701-clk.h> 61 #include <dt-bindings/clock/mt2701-clk.h>
62 #include <dt-bindings/interrupt-controller 62 #include <dt-bindings/interrupt-controller/arm-gic.h>
63 #include <dt-bindings/memory/mt2701-larb-p 63 #include <dt-bindings/memory/mt2701-larb-port.h>
64 #include <dt-bindings/power/mt2701-power.h 64 #include <dt-bindings/power/mt2701-power.h>
65 jpegenc: jpegenc@1500a000 { 65 jpegenc: jpegenc@1500a000 {
66 compatible = "mediatek,mt2701-jpgenc", 66 compatible = "mediatek,mt2701-jpgenc",
67 "mediatek,mtk-jpgenc"; 67 "mediatek,mtk-jpgenc";
68 reg = <0x1500a000 0x1000>; 68 reg = <0x1500a000 0x1000>;
69 interrupts = <GIC_SPI 141 IRQ_TYPE_LEVEL 69 interrupts = <GIC_SPI 141 IRQ_TYPE_LEVEL_LOW>;
70 clocks = <&imgsys CLK_IMG_VENC>; 70 clocks = <&imgsys CLK_IMG_VENC>;
71 clock-names = "jpgenc"; 71 clock-names = "jpgenc";
72 power-domains = <&scpsys MT2701_POWER_DO 72 power-domains = <&scpsys MT2701_POWER_DOMAIN_ISP>;
73 iommus = <&iommu MT2701_M4U_PORT_JPGENC_ 73 iommus = <&iommu MT2701_M4U_PORT_JPGENC_RDMA>,
74 <&iommu MT2701_M4U_PORT_JPGENC_ 74 <&iommu MT2701_M4U_PORT_JPGENC_BSDMA>;
75 }; 75 };
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