1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-C 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 2 2 3 %YAML 1.2 3 %YAML 1.2 4 --- 4 --- 5 $id: http://devicetree.org/schemas/media/nxp,i !! 5 $id: "http://devicetree.org/schemas/media/nxp,imx8mq-vpu.yaml#" 6 $schema: http://devicetree.org/meta-schemas/co !! 6 $schema: "http://devicetree.org/meta-schemas/core.yaml#" 7 7 8 title: Hantro G1/G2 VPU codecs implemented on !! 8 title: Hantro G1/G2 VPU codecs implemented on i.MX8MQ SoCs 9 9 10 maintainers: 10 maintainers: 11 - Philipp Zabel <p.zabel@pengutronix.de> 11 - Philipp Zabel <p.zabel@pengutronix.de> 12 12 13 description: 13 description: 14 Hantro G1/G2 video decode accelerators prese 14 Hantro G1/G2 video decode accelerators present on i.MX8MQ SoCs. 15 15 16 properties: 16 properties: 17 compatible: 17 compatible: 18 oneOf: !! 18 const: nxp,imx8mq-vpu 19 - const: nxp,imx8mq-vpu << 20 deprecated: true << 21 - const: nxp,imx8mq-vpu-g1 << 22 - const: nxp,imx8mq-vpu-g2 << 23 - const: nxp,imx8mm-vpu-g1 << 24 19 25 reg: 20 reg: 26 maxItems: 1 !! 21 maxItems: 3 >> 22 >> 23 reg-names: >> 24 items: >> 25 - const: g1 >> 26 - const: g2 >> 27 - const: ctrl 27 28 28 interrupts: 29 interrupts: 29 maxItems: 1 !! 30 maxItems: 2 >> 31 >> 32 interrupt-names: >> 33 items: >> 34 - const: g1 >> 35 - const: g2 30 36 31 clocks: 37 clocks: 32 maxItems: 1 !! 38 maxItems: 3 >> 39 >> 40 clock-names: >> 41 items: >> 42 - const: g1 >> 43 - const: g2 >> 44 - const: bus 33 45 34 power-domains: 46 power-domains: 35 maxItems: 1 47 maxItems: 1 36 48 37 required: 49 required: 38 - compatible 50 - compatible 39 - reg 51 - reg >> 52 - reg-names 40 - interrupts 53 - interrupts >> 54 - interrupt-names 41 - clocks 55 - clocks >> 56 - clock-names 42 57 43 additionalProperties: false 58 additionalProperties: false 44 59 45 examples: 60 examples: 46 - | 61 - | 47 #include <dt-bindings/clock/imx8mq-clo 62 #include <dt-bindings/clock/imx8mq-clock.h> 48 #include <dt-bindings/power/imx8mq-pow << 49 #include <dt-bindings/interrupt-contro << 50 << 51 vpu_g1: video-codec@38300000 { << 52 compatible = "nxp,imx8mq-vpu-g << 53 reg = <0x38300000 0x10000>; << 54 interrupts = <GIC_SPI 7 IRQ_TY << 55 clocks = <&clk IMX8MQ_CLK_VPU_ << 56 power-domains = <&vpu_blk_ctrl << 57 }; << 58 - | << 59 #include <dt-bindings/clock/imx8mq-clo << 60 #include <dt-bindings/power/imx8mq-pow << 61 #include <dt-bindings/interrupt-contro 63 #include <dt-bindings/interrupt-controller/arm-gic.h> 62 64 63 vpu_g2: video-codec@38300000 { !! 65 vpu: video-codec@38300000 { 64 compatible = "nxp,imx8mq-vpu-g !! 66 compatible = "nxp,imx8mq-vpu"; 65 reg = <0x38310000 0x10000>; !! 67 reg = <0x38300000 0x10000>, 66 interrupts = <GIC_SPI 8 IRQ_TY !! 68 <0x38310000 0x10000>, 67 clocks = <&clk IMX8MQ_CLK_VPU_ !! 69 <0x38320000 0x10000>; 68 power-domains = <&vpu_blk_ctrl !! 70 reg-names = "g1", "g2", "ctrl"; >> 71 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>, >> 72 <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>; >> 73 interrupt-names = "g1", "g2"; >> 74 clocks = <&clk IMX8MQ_CLK_VPU_G1_ROOT>, >> 75 <&clk IMX8MQ_CLK_VPU_G2_ROOT>, >> 76 <&clk IMX8MQ_CLK_VPU_DEC_ROOT>; >> 77 clock-names = "g1", "g2", "bus"; >> 78 power-domains = <&pgc_vpu>; 69 }; 79 };
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