1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-C 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
2 2
3 %YAML 1.2 3 %YAML 1.2
4 --- 4 ---
5 $id: http://devicetree.org/schemas/media/qcom, 5 $id: http://devicetree.org/schemas/media/qcom,msm8916-camss.yaml#
6 $schema: http://devicetree.org/meta-schemas/co 6 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 7
8 title: Qualcomm CAMSS ISP 8 title: Qualcomm CAMSS ISP
9 9
10 maintainers: 10 maintainers:
11 - Robert Foss <robert.foss@linaro.org> 11 - Robert Foss <robert.foss@linaro.org>
12 - Todor Tomov <todor.too@gmail.com> 12 - Todor Tomov <todor.too@gmail.com>
13 13
14 description: | 14 description: |
15 The CAMSS IP is a CSI decoder and ISP presen 15 The CAMSS IP is a CSI decoder and ISP present on Qualcomm platforms
16 16
17 properties: 17 properties:
18 compatible: 18 compatible:
19 const: qcom,msm8916-camss 19 const: qcom,msm8916-camss
20 20
21 clocks: 21 clocks:
22 minItems: 19 22 minItems: 19
23 maxItems: 19 23 maxItems: 19
24 24
25 clock-names: 25 clock-names:
26 items: 26 items:
27 - const: top_ahb 27 - const: top_ahb
28 - const: ispif_ahb 28 - const: ispif_ahb
29 - const: csiphy0_timer 29 - const: csiphy0_timer
30 - const: csiphy1_timer 30 - const: csiphy1_timer
31 - const: csi0_ahb 31 - const: csi0_ahb
32 - const: csi0 32 - const: csi0
33 - const: csi0_phy 33 - const: csi0_phy
34 - const: csi0_pix 34 - const: csi0_pix
35 - const: csi0_rdi 35 - const: csi0_rdi
36 - const: csi1_ahb 36 - const: csi1_ahb
37 - const: csi1 37 - const: csi1
38 - const: csi1_phy 38 - const: csi1_phy
39 - const: csi1_pix 39 - const: csi1_pix
40 - const: csi1_rdi 40 - const: csi1_rdi
41 - const: ahb 41 - const: ahb
42 - const: vfe0 42 - const: vfe0
43 - const: csi_vfe0 43 - const: csi_vfe0
44 - const: vfe_ahb 44 - const: vfe_ahb
45 - const: vfe_axi 45 - const: vfe_axi
46 46
47 interrupts: 47 interrupts:
48 minItems: 6 48 minItems: 6
49 maxItems: 6 49 maxItems: 6
50 50
51 interrupt-names: 51 interrupt-names:
52 items: 52 items:
53 - const: csiphy0 53 - const: csiphy0
54 - const: csiphy1 54 - const: csiphy1
55 - const: csid0 55 - const: csid0
56 - const: csid1 56 - const: csid1
57 - const: ispif 57 - const: ispif
58 - const: vfe0 58 - const: vfe0
59 59
60 iommus: 60 iommus:
61 maxItems: 1 61 maxItems: 1
62 62
63 power-domains: 63 power-domains:
64 items: 64 items:
65 - description: VFE GDSC - Video Front En 65 - description: VFE GDSC - Video Front End, Global Distributed Switch Controller.
66 66
67 ports: 67 ports:
68 $ref: /schemas/graph.yaml#/properties/port 68 $ref: /schemas/graph.yaml#/properties/ports
69 69
70 description: 70 description:
71 CSI input ports. 71 CSI input ports.
72 72
73 properties: 73 properties:
74 port@0: 74 port@0:
75 $ref: /schemas/graph.yaml#/$defs/port- 75 $ref: /schemas/graph.yaml#/$defs/port-base
76 unevaluatedProperties: false 76 unevaluatedProperties: false
77 description: 77 description:
78 Input port for receiving CSI data. 78 Input port for receiving CSI data.
79 79
80 properties: 80 properties:
81 endpoint: 81 endpoint:
82 $ref: video-interfaces.yaml# 82 $ref: video-interfaces.yaml#
83 unevaluatedProperties: false 83 unevaluatedProperties: false
84 84
85 properties: 85 properties:
86 data-lanes: 86 data-lanes:
87 description: 87 description:
88 An array of physical data la 88 An array of physical data lanes indexes.
89 Position of an entry determi 89 Position of an entry determines the logical
90 lane number, while the value 90 lane number, while the value of an entry
91 indicates physical lane inde 91 indicates physical lane index. Lane swapping
92 is supported. Physical lane 92 is supported. Physical lane indexes;
93 0, 2, 3, 4. 93 0, 2, 3, 4.
94 minItems: 1 94 minItems: 1
95 maxItems: 4 95 maxItems: 4
96 96
97 required: 97 required:
98 - data-lanes 98 - data-lanes
99 99
100 port@1: 100 port@1:
101 $ref: /schemas/graph.yaml#/$defs/port- 101 $ref: /schemas/graph.yaml#/$defs/port-base
102 unevaluatedProperties: false 102 unevaluatedProperties: false
103 description: 103 description:
104 Input port for receiving CSI data. 104 Input port for receiving CSI data.
105 105
106 properties: 106 properties:
107 endpoint: 107 endpoint:
108 $ref: video-interfaces.yaml# 108 $ref: video-interfaces.yaml#
109 unevaluatedProperties: false 109 unevaluatedProperties: false
110 110
111 properties: 111 properties:
112 data-lanes: 112 data-lanes:
113 minItems: 1 113 minItems: 1
114 maxItems: 4 114 maxItems: 4
115 115
116 required: 116 required:
117 - data-lanes 117 - data-lanes
118 118
119 reg: 119 reg:
120 minItems: 9 120 minItems: 9
121 maxItems: 9 121 maxItems: 9
122 122
123 reg-names: 123 reg-names:
124 items: 124 items:
125 - const: csiphy0 125 - const: csiphy0
126 - const: csiphy0_clk_mux 126 - const: csiphy0_clk_mux
127 - const: csiphy1 127 - const: csiphy1
128 - const: csiphy1_clk_mux 128 - const: csiphy1_clk_mux
129 - const: csid0 129 - const: csid0
130 - const: csid1 130 - const: csid1
131 - const: ispif 131 - const: ispif
132 - const: csi_clk_mux 132 - const: csi_clk_mux
133 - const: vfe0 133 - const: vfe0
134 134
135 vdda-supply: 135 vdda-supply:
136 description: 136 description:
137 Definition of the regulator used as anal 137 Definition of the regulator used as analog power supply.
138 138
139 required: 139 required:
140 - clock-names 140 - clock-names
141 - clocks 141 - clocks
142 - compatible 142 - compatible
143 - interrupt-names 143 - interrupt-names
144 - interrupts 144 - interrupts
145 - iommus 145 - iommus
146 - power-domains 146 - power-domains
147 - reg 147 - reg
148 - reg-names 148 - reg-names
149 - vdda-supply 149 - vdda-supply
150 150
151 additionalProperties: false 151 additionalProperties: false
152 152
153 examples: 153 examples:
154 - | 154 - |
155 #include <dt-bindings/interrupt-controller 155 #include <dt-bindings/interrupt-controller/arm-gic.h>
156 #include <dt-bindings/clock/qcom,gcc-msm89 156 #include <dt-bindings/clock/qcom,gcc-msm8916.h>
157 157
158 camss: camss@1b0ac00 { !! 158 camss: camss@1b00000 {
159 compatible = "qcom,msm8916-camss"; 159 compatible = "qcom,msm8916-camss";
160 160
161 clocks = <&gcc GCC_CAMSS_TOP_AHB_CLK>, 161 clocks = <&gcc GCC_CAMSS_TOP_AHB_CLK>,
162 <&gcc GCC_CAMSS_ISPIF_AHB_CLK>, 162 <&gcc GCC_CAMSS_ISPIF_AHB_CLK>,
163 <&gcc GCC_CAMSS_CSI0PHYTIMER_CLK>, 163 <&gcc GCC_CAMSS_CSI0PHYTIMER_CLK>,
164 <&gcc GCC_CAMSS_CSI1PHYTIMER_CLK>, 164 <&gcc GCC_CAMSS_CSI1PHYTIMER_CLK>,
165 <&gcc GCC_CAMSS_CSI0_AHB_CLK>, 165 <&gcc GCC_CAMSS_CSI0_AHB_CLK>,
166 <&gcc GCC_CAMSS_CSI0_CLK>, 166 <&gcc GCC_CAMSS_CSI0_CLK>,
167 <&gcc GCC_CAMSS_CSI0PHY_CLK>, 167 <&gcc GCC_CAMSS_CSI0PHY_CLK>,
168 <&gcc GCC_CAMSS_CSI0PIX_CLK>, 168 <&gcc GCC_CAMSS_CSI0PIX_CLK>,
169 <&gcc GCC_CAMSS_CSI0RDI_CLK>, 169 <&gcc GCC_CAMSS_CSI0RDI_CLK>,
170 <&gcc GCC_CAMSS_CSI1_AHB_CLK>, 170 <&gcc GCC_CAMSS_CSI1_AHB_CLK>,
171 <&gcc GCC_CAMSS_CSI1_CLK>, 171 <&gcc GCC_CAMSS_CSI1_CLK>,
172 <&gcc GCC_CAMSS_CSI1PHY_CLK>, 172 <&gcc GCC_CAMSS_CSI1PHY_CLK>,
173 <&gcc GCC_CAMSS_CSI1PIX_CLK>, 173 <&gcc GCC_CAMSS_CSI1PIX_CLK>,
174 <&gcc GCC_CAMSS_CSI1RDI_CLK>, 174 <&gcc GCC_CAMSS_CSI1RDI_CLK>,
175 <&gcc GCC_CAMSS_AHB_CLK>, 175 <&gcc GCC_CAMSS_AHB_CLK>,
176 <&gcc GCC_CAMSS_VFE0_CLK>, 176 <&gcc GCC_CAMSS_VFE0_CLK>,
177 <&gcc GCC_CAMSS_CSI_VFE0_CLK>, 177 <&gcc GCC_CAMSS_CSI_VFE0_CLK>,
178 <&gcc GCC_CAMSS_VFE_AHB_CLK>, 178 <&gcc GCC_CAMSS_VFE_AHB_CLK>,
179 <&gcc GCC_CAMSS_VFE_AXI_CLK>; 179 <&gcc GCC_CAMSS_VFE_AXI_CLK>;
180 180
181 clock-names = "top_ahb", 181 clock-names = "top_ahb",
182 "ispif_ahb", 182 "ispif_ahb",
183 "csiphy0_timer", 183 "csiphy0_timer",
184 "csiphy1_timer", 184 "csiphy1_timer",
185 "csi0_ahb", 185 "csi0_ahb",
186 "csi0", 186 "csi0",
187 "csi0_phy", 187 "csi0_phy",
188 "csi0_pix", 188 "csi0_pix",
189 "csi0_rdi", 189 "csi0_rdi",
190 "csi1_ahb", 190 "csi1_ahb",
191 "csi1", 191 "csi1",
192 "csi1_phy", 192 "csi1_phy",
193 "csi1_pix", 193 "csi1_pix",
194 "csi1_rdi", 194 "csi1_rdi",
195 "ahb", 195 "ahb",
196 "vfe0", 196 "vfe0",
197 "csi_vfe0", 197 "csi_vfe0",
198 "vfe_ahb", 198 "vfe_ahb",
199 "vfe_axi"; 199 "vfe_axi";
200 200
201 interrupts = <GIC_SPI 78 IRQ_TYPE_EDGE_R 201 interrupts = <GIC_SPI 78 IRQ_TYPE_EDGE_RISING>,
202 <GIC_SPI 79 IRQ_TYPE_EDGE_RISING>, 202 <GIC_SPI 79 IRQ_TYPE_EDGE_RISING>,
203 <GIC_SPI 51 IRQ_TYPE_EDGE_RISING>, 203 <GIC_SPI 51 IRQ_TYPE_EDGE_RISING>,
204 <GIC_SPI 52 IRQ_TYPE_EDGE_RISING>, 204 <GIC_SPI 52 IRQ_TYPE_EDGE_RISING>,
205 <GIC_SPI 55 IRQ_TYPE_EDGE_RISING>, 205 <GIC_SPI 55 IRQ_TYPE_EDGE_RISING>,
206 <GIC_SPI 57 IRQ_TYPE_EDGE_RISING>; 206 <GIC_SPI 57 IRQ_TYPE_EDGE_RISING>;
207 207
208 interrupt-names = "csiphy0", 208 interrupt-names = "csiphy0",
209 "csiphy1", 209 "csiphy1",
210 "csid0", 210 "csid0",
211 "csid1", 211 "csid1",
212 "ispif", 212 "ispif",
213 "vfe0"; 213 "vfe0";
214 214
215 iommus = <&apps_iommu 3>; 215 iommus = <&apps_iommu 3>;
216 216
217 power-domains = <&gcc VFE_GDSC>; 217 power-domains = <&gcc VFE_GDSC>;
218 218
219 reg = <0x01b0ac00 0x200>, 219 reg = <0x01b0ac00 0x200>,
220 <0x01b00030 0x4>, 220 <0x01b00030 0x4>,
221 <0x01b0b000 0x200>, 221 <0x01b0b000 0x200>,
222 <0x01b00038 0x4>, 222 <0x01b00038 0x4>,
223 <0x01b08000 0x100>, 223 <0x01b08000 0x100>,
224 <0x01b08400 0x100>, 224 <0x01b08400 0x100>,
225 <0x01b0a000 0x500>, 225 <0x01b0a000 0x500>,
226 <0x01b00020 0x10>, 226 <0x01b00020 0x10>,
227 <0x01b10000 0x1000>; 227 <0x01b10000 0x1000>;
228 228
229 reg-names = "csiphy0", 229 reg-names = "csiphy0",
230 "csiphy0_clk_mux", 230 "csiphy0_clk_mux",
231 "csiphy1", 231 "csiphy1",
232 "csiphy1_clk_mux", 232 "csiphy1_clk_mux",
233 "csid0", 233 "csid0",
234 "csid1", 234 "csid1",
235 "ispif", 235 "ispif",
236 "csi_clk_mux", 236 "csi_clk_mux",
237 "vfe0"; 237 "vfe0";
238 238
239 vdda-supply = <®_2v8>; 239 vdda-supply = <®_2v8>;
240 240
241 ports { 241 ports {
242 #address-cells = <1>; 242 #address-cells = <1>;
243 #size-cells = <0>; 243 #size-cells = <0>;
244 }; 244 };
245 245
246 }; 246 };
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