1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-C 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
2 %YAML 1.2 2 %YAML 1.2
3 --- 3 ---
4 $id: http://devicetree.org/schemas/media/qcom, 4 $id: http://devicetree.org/schemas/media/qcom,msm8996-venus.yaml#
5 $schema: http://devicetree.org/meta-schemas/co 5 $schema: http://devicetree.org/meta-schemas/core.yaml#
6 6
7 title: Qualcomm MSM8996 Venus video encode and 7 title: Qualcomm MSM8996 Venus video encode and decode accelerators
8 8
9 maintainers: 9 maintainers:
10 - Stanimir Varbanov <stanimir.varbanov@linaro 10 - Stanimir Varbanov <stanimir.varbanov@linaro.org>
11 11
12 description: | 12 description: |
13 The Venus IP is a video encode and decode ac 13 The Venus IP is a video encode and decode accelerator present
14 on Qualcomm platforms 14 on Qualcomm platforms
15 15
16 allOf: 16 allOf:
17 - $ref: qcom,venus-common.yaml# 17 - $ref: qcom,venus-common.yaml#
18 18
19 properties: 19 properties:
20 compatible: 20 compatible:
21 enum: !! 21 const: qcom,msm8996-venus
22 - qcom,msm8996-venus <<
23 - qcom,msm8998-venus <<
24 22
25 power-domains: 23 power-domains:
26 maxItems: 1 24 maxItems: 1
27 25
28 clocks: 26 clocks:
29 maxItems: 4 27 maxItems: 4
30 28
31 clock-names: 29 clock-names:
32 items: 30 items:
33 - const: core 31 - const: core
34 - const: iface 32 - const: iface
35 - const: bus 33 - const: bus
36 - const: mbus 34 - const: mbus
37 35
38 interconnects: 36 interconnects:
39 maxItems: 2 37 maxItems: 2
40 38
41 interconnect-names: 39 interconnect-names:
42 items: 40 items:
43 - const: video-mem 41 - const: video-mem
44 - const: cpu-cfg 42 - const: cpu-cfg
45 43
46 iommus: 44 iommus:
47 maxItems: 20 45 maxItems: 20
48 46
49 video-decoder: 47 video-decoder:
50 type: object 48 type: object
51 49
52 properties: 50 properties:
53 compatible: 51 compatible:
54 const: venus-decoder 52 const: venus-decoder
55 53
56 clocks: 54 clocks:
57 maxItems: 1 55 maxItems: 1
58 56
59 clock-names: 57 clock-names:
60 items: 58 items:
61 - const: core 59 - const: core
62 60
63 power-domains: 61 power-domains:
64 maxItems: 1 62 maxItems: 1
65 63
66 required: 64 required:
67 - compatible 65 - compatible
68 - clocks 66 - clocks
69 - clock-names 67 - clock-names
70 - power-domains 68 - power-domains
71 69
72 additionalProperties: false 70 additionalProperties: false
73 71
74 video-encoder: 72 video-encoder:
75 type: object 73 type: object
76 74
77 properties: 75 properties:
78 compatible: 76 compatible:
79 const: venus-encoder 77 const: venus-encoder
80 78
81 clocks: 79 clocks:
82 maxItems: 1 80 maxItems: 1
83 81
84 clock-names: 82 clock-names:
85 items: 83 items:
86 - const: core 84 - const: core
87 85
88 power-domains: 86 power-domains:
89 maxItems: 1 87 maxItems: 1
90 88
91 required: 89 required:
92 - compatible 90 - compatible
93 - clocks 91 - clocks
94 - clock-names 92 - clock-names
95 - power-domains 93 - power-domains
96 94
97 additionalProperties: false 95 additionalProperties: false
98 96
99 required: 97 required:
100 - compatible 98 - compatible
101 - iommus 99 - iommus
102 - video-decoder 100 - video-decoder
103 - video-encoder 101 - video-encoder
104 102
105 unevaluatedProperties: false 103 unevaluatedProperties: false
106 104
107 examples: 105 examples:
108 - | 106 - |
109 #include <dt-bindings/interrupt-controller 107 #include <dt-bindings/interrupt-controller/arm-gic.h>
110 #include <dt-bindings/clock/qcom,mmcc-msm8 108 #include <dt-bindings/clock/qcom,mmcc-msm8996.h>
111 109
112 video-codec@c00000 { 110 video-codec@c00000 {
113 compatible = "qcom,msm8996-venus"; 111 compatible = "qcom,msm8996-venus";
114 reg = <0x00c00000 0xff000>; 112 reg = <0x00c00000 0xff000>;
115 interrupts = <GIC_SPI 287 IRQ_TYPE_LEV 113 interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
116 clocks = <&mmcc VIDEO_CORE_CLK>, 114 clocks = <&mmcc VIDEO_CORE_CLK>,
117 <&mmcc VIDEO_AHB_CLK>, 115 <&mmcc VIDEO_AHB_CLK>,
118 <&mmcc VIDEO_AXI_CLK>, 116 <&mmcc VIDEO_AXI_CLK>,
119 <&mmcc VIDEO_MAXI_CLK>; 117 <&mmcc VIDEO_MAXI_CLK>;
120 clock-names = "core", "iface", "bus", 118 clock-names = "core", "iface", "bus", "mbus";
121 power-domains = <&mmcc VENUS_GDSC>; 119 power-domains = <&mmcc VENUS_GDSC>;
122 iommus = <&venus_smmu 0x00>, 120 iommus = <&venus_smmu 0x00>,
123 <&venus_smmu 0x01>, 121 <&venus_smmu 0x01>,
124 <&venus_smmu 0x0a>, 122 <&venus_smmu 0x0a>,
125 <&venus_smmu 0x07>, 123 <&venus_smmu 0x07>,
126 <&venus_smmu 0x0e>, 124 <&venus_smmu 0x0e>,
127 <&venus_smmu 0x0f>, 125 <&venus_smmu 0x0f>,
128 <&venus_smmu 0x08>, 126 <&venus_smmu 0x08>,
129 <&venus_smmu 0x09>, 127 <&venus_smmu 0x09>,
130 <&venus_smmu 0x0b>, 128 <&venus_smmu 0x0b>,
131 <&venus_smmu 0x0c>, 129 <&venus_smmu 0x0c>,
132 <&venus_smmu 0x0d>, 130 <&venus_smmu 0x0d>,
133 <&venus_smmu 0x10>, 131 <&venus_smmu 0x10>,
134 <&venus_smmu 0x11>, 132 <&venus_smmu 0x11>,
135 <&venus_smmu 0x21>, 133 <&venus_smmu 0x21>,
136 <&venus_smmu 0x28>, 134 <&venus_smmu 0x28>,
137 <&venus_smmu 0x29>, 135 <&venus_smmu 0x29>,
138 <&venus_smmu 0x2b>, 136 <&venus_smmu 0x2b>,
139 <&venus_smmu 0x2c>, 137 <&venus_smmu 0x2c>,
140 <&venus_smmu 0x2d>, 138 <&venus_smmu 0x2d>,
141 <&venus_smmu 0x31>; 139 <&venus_smmu 0x31>;
142 memory-region = <&venus_mem>; 140 memory-region = <&venus_mem>;
143 141
144 video-decoder { 142 video-decoder {
145 compatible = "venus-decoder"; 143 compatible = "venus-decoder";
146 clocks = <&mmcc VIDEO_SUBCORE0_CLK 144 clocks = <&mmcc VIDEO_SUBCORE0_CLK>;
147 clock-names = "core"; 145 clock-names = "core";
148 power-domains = <&mmcc VENUS_CORE0 146 power-domains = <&mmcc VENUS_CORE0_GDSC>;
149 }; 147 };
150 148
151 video-encoder { 149 video-encoder {
152 compatible = "venus-encoder"; 150 compatible = "venus-encoder";
153 clocks = <&mmcc VIDEO_SUBCORE1_CLK 151 clocks = <&mmcc VIDEO_SUBCORE1_CLK>;
154 clock-names = "core"; 152 clock-names = "core";
155 power-domains = <&mmcc VENUS_CORE1 153 power-domains = <&mmcc VENUS_CORE1_GDSC>;
156 }; 154 };
157 }; 155 };
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