1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-C 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
2 %YAML 1.2 2 %YAML 1.2
3 --- 3 ---
4 $id: http://devicetree.org/schemas/media/qcom, 4 $id: http://devicetree.org/schemas/media/qcom,msm8996-venus.yaml#
5 $schema: http://devicetree.org/meta-schemas/co 5 $schema: http://devicetree.org/meta-schemas/core.yaml#
6 6
7 title: Qualcomm MSM8996 Venus video encode and 7 title: Qualcomm MSM8996 Venus video encode and decode accelerators
8 8
9 maintainers: 9 maintainers:
10 - Stanimir Varbanov <stanimir.varbanov@linaro 10 - Stanimir Varbanov <stanimir.varbanov@linaro.org>
11 11
12 description: | 12 description: |
13 The Venus IP is a video encode and decode ac 13 The Venus IP is a video encode and decode accelerator present
14 on Qualcomm platforms 14 on Qualcomm platforms
15 15
16 allOf: 16 allOf:
17 - $ref: qcom,venus-common.yaml# 17 - $ref: qcom,venus-common.yaml#
18 18
19 properties: 19 properties:
20 compatible: 20 compatible:
21 enum: 21 enum:
22 - qcom,msm8996-venus 22 - qcom,msm8996-venus
23 - qcom,msm8998-venus 23 - qcom,msm8998-venus
24 24
25 power-domains: 25 power-domains:
26 maxItems: 1 26 maxItems: 1
27 27
28 clocks: 28 clocks:
29 maxItems: 4 29 maxItems: 4
30 30
31 clock-names: 31 clock-names:
32 items: 32 items:
33 - const: core 33 - const: core
34 - const: iface 34 - const: iface
35 - const: bus 35 - const: bus
36 - const: mbus 36 - const: mbus
37 37
38 interconnects: 38 interconnects:
39 maxItems: 2 39 maxItems: 2
40 40
41 interconnect-names: 41 interconnect-names:
42 items: 42 items:
43 - const: video-mem 43 - const: video-mem
44 - const: cpu-cfg 44 - const: cpu-cfg
45 45
46 iommus: 46 iommus:
47 maxItems: 20 47 maxItems: 20
48 48
49 video-decoder: 49 video-decoder:
50 type: object 50 type: object
51 51
52 properties: 52 properties:
53 compatible: 53 compatible:
54 const: venus-decoder 54 const: venus-decoder
55 55
56 clocks: 56 clocks:
57 maxItems: 1 57 maxItems: 1
58 58
59 clock-names: 59 clock-names:
60 items: 60 items:
61 - const: core 61 - const: core
62 62
63 power-domains: 63 power-domains:
64 maxItems: 1 64 maxItems: 1
65 65
66 required: 66 required:
67 - compatible 67 - compatible
68 - clocks 68 - clocks
69 - clock-names 69 - clock-names
70 - power-domains 70 - power-domains
71 71
72 additionalProperties: false 72 additionalProperties: false
73 73
74 video-encoder: 74 video-encoder:
75 type: object 75 type: object
76 76
77 properties: 77 properties:
78 compatible: 78 compatible:
79 const: venus-encoder 79 const: venus-encoder
80 80
81 clocks: 81 clocks:
82 maxItems: 1 82 maxItems: 1
83 83
84 clock-names: 84 clock-names:
85 items: 85 items:
86 - const: core 86 - const: core
87 87
88 power-domains: 88 power-domains:
89 maxItems: 1 89 maxItems: 1
90 90
91 required: 91 required:
92 - compatible 92 - compatible
93 - clocks 93 - clocks
94 - clock-names 94 - clock-names
95 - power-domains 95 - power-domains
96 96
97 additionalProperties: false 97 additionalProperties: false
98 98
99 required: 99 required:
100 - compatible 100 - compatible
101 - iommus 101 - iommus
102 - video-decoder 102 - video-decoder
103 - video-encoder 103 - video-encoder
104 104
105 unevaluatedProperties: false 105 unevaluatedProperties: false
106 106
107 examples: 107 examples:
108 - | 108 - |
109 #include <dt-bindings/interrupt-controller 109 #include <dt-bindings/interrupt-controller/arm-gic.h>
110 #include <dt-bindings/clock/qcom,mmcc-msm8 110 #include <dt-bindings/clock/qcom,mmcc-msm8996.h>
111 111
112 video-codec@c00000 { 112 video-codec@c00000 {
113 compatible = "qcom,msm8996-venus"; 113 compatible = "qcom,msm8996-venus";
114 reg = <0x00c00000 0xff000>; 114 reg = <0x00c00000 0xff000>;
115 interrupts = <GIC_SPI 287 IRQ_TYPE_LEV 115 interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
116 clocks = <&mmcc VIDEO_CORE_CLK>, 116 clocks = <&mmcc VIDEO_CORE_CLK>,
117 <&mmcc VIDEO_AHB_CLK>, 117 <&mmcc VIDEO_AHB_CLK>,
118 <&mmcc VIDEO_AXI_CLK>, 118 <&mmcc VIDEO_AXI_CLK>,
119 <&mmcc VIDEO_MAXI_CLK>; 119 <&mmcc VIDEO_MAXI_CLK>;
120 clock-names = "core", "iface", "bus", 120 clock-names = "core", "iface", "bus", "mbus";
121 power-domains = <&mmcc VENUS_GDSC>; 121 power-domains = <&mmcc VENUS_GDSC>;
122 iommus = <&venus_smmu 0x00>, 122 iommus = <&venus_smmu 0x00>,
123 <&venus_smmu 0x01>, 123 <&venus_smmu 0x01>,
124 <&venus_smmu 0x0a>, 124 <&venus_smmu 0x0a>,
125 <&venus_smmu 0x07>, 125 <&venus_smmu 0x07>,
126 <&venus_smmu 0x0e>, 126 <&venus_smmu 0x0e>,
127 <&venus_smmu 0x0f>, 127 <&venus_smmu 0x0f>,
128 <&venus_smmu 0x08>, 128 <&venus_smmu 0x08>,
129 <&venus_smmu 0x09>, 129 <&venus_smmu 0x09>,
130 <&venus_smmu 0x0b>, 130 <&venus_smmu 0x0b>,
131 <&venus_smmu 0x0c>, 131 <&venus_smmu 0x0c>,
132 <&venus_smmu 0x0d>, 132 <&venus_smmu 0x0d>,
133 <&venus_smmu 0x10>, 133 <&venus_smmu 0x10>,
134 <&venus_smmu 0x11>, 134 <&venus_smmu 0x11>,
135 <&venus_smmu 0x21>, 135 <&venus_smmu 0x21>,
136 <&venus_smmu 0x28>, 136 <&venus_smmu 0x28>,
137 <&venus_smmu 0x29>, 137 <&venus_smmu 0x29>,
138 <&venus_smmu 0x2b>, 138 <&venus_smmu 0x2b>,
139 <&venus_smmu 0x2c>, 139 <&venus_smmu 0x2c>,
140 <&venus_smmu 0x2d>, 140 <&venus_smmu 0x2d>,
141 <&venus_smmu 0x31>; 141 <&venus_smmu 0x31>;
142 memory-region = <&venus_mem>; 142 memory-region = <&venus_mem>;
143 143
144 video-decoder { 144 video-decoder {
145 compatible = "venus-decoder"; 145 compatible = "venus-decoder";
146 clocks = <&mmcc VIDEO_SUBCORE0_CLK 146 clocks = <&mmcc VIDEO_SUBCORE0_CLK>;
147 clock-names = "core"; 147 clock-names = "core";
148 power-domains = <&mmcc VENUS_CORE0 148 power-domains = <&mmcc VENUS_CORE0_GDSC>;
149 }; 149 };
150 150
151 video-encoder { 151 video-encoder {
152 compatible = "venus-encoder"; 152 compatible = "venus-encoder";
153 clocks = <&mmcc VIDEO_SUBCORE1_CLK 153 clocks = <&mmcc VIDEO_SUBCORE1_CLK>;
154 clock-names = "core"; 154 clock-names = "core";
155 power-domains = <&mmcc VENUS_CORE1 155 power-domains = <&mmcc VENUS_CORE1_GDSC>;
156 }; 156 };
157 }; 157 };
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