1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-C
2 %YAML 1.2
3 ---
4 $id: http://devicetree.org/schemas/media/qcom,
5 $schema: http://devicetree.org/meta-schemas/co
6
7 title: Qualcomm SM8250 Venus video encode and
8
9 maintainers:
10 - Stanimir Varbanov <stanimir.varbanov@linaro
11
12 description: |
13 The Venus IP is a video encode and decode ac
14 on Qualcomm platforms
15
16 allOf:
17 - $ref: qcom,venus-common.yaml#
18
19 properties:
20 compatible:
21 const: qcom,sm8250-venus
22
23 power-domains:
24 minItems: 2
25 maxItems: 3
26
27 power-domain-names:
28 minItems: 2
29 items:
30 - const: venus
31 - const: vcodec0
32 - const: mx
33
34 clocks:
35 maxItems: 3
36
37 clock-names:
38 items:
39 - const: iface
40 - const: core
41 - const: vcodec0_core
42
43 iommus:
44 maxItems: 1
45
46 interconnects:
47 maxItems: 2
48
49 interconnect-names:
50 items:
51 - const: cpu-cfg
52 - const: video-mem
53
54 operating-points-v2: true
55 opp-table:
56 type: object
57
58 resets:
59 maxItems: 2
60
61 reset-names:
62 items:
63 - const: bus
64 - const: core
65
66 video-decoder:
67 type: object
68
69 properties:
70 compatible:
71 const: venus-decoder
72
73 required:
74 - compatible
75
76 additionalProperties: false
77
78 video-encoder:
79 type: object
80
81 properties:
82 compatible:
83 const: venus-encoder
84
85 required:
86 - compatible
87
88 additionalProperties: false
89
90 required:
91 - compatible
92 - power-domain-names
93 - interconnects
94 - interconnect-names
95 - iommus
96 - resets
97 - reset-names
98 - video-decoder
99 - video-encoder
100
101 unevaluatedProperties: false
102
103 examples:
104 - |
105 #include <dt-bindings/interrupt-controller
106 #include <dt-bindings/clock/qcom,videocc-s
107 #include <dt-bindings/interconnect/qcom,sm
108 #include <dt-bindings/clock/qcom,gcc-sm825
109 #include <dt-bindings/power/qcom,rpmhpd.h>
110
111 venus: video-codec@aa00000 {
112 compatible = "qcom,sm8250-venus";
113 reg = <0x0aa00000 0xff000>;
114 interrupts = <GIC_SPI 174 IRQ_TYPE_LEV
115 power-domains = <&videocc MVS0C_GDSC>,
116 <&videocc MVS0_GDSC>,
117 <&rpmhpd RPMHPD_MX>;
118 power-domain-names = "venus", "vcodec0
119
120 clocks = <&gcc GCC_VIDEO_AXI0_CLK>,
121 <&videocc VIDEO_CC_MVS0C_CLK>
122 <&videocc VIDEO_CC_MVS0_CLK>;
123 clock-names = "iface", "core", "vcodec
124
125 interconnects = <&gem_noc MASTER_AMPSS
126 <&mmss_noc MASTER_VIDE
127 interconnect-names = "cpu-cfg", "video
128
129 iommus = <&apps_smmu 0x2100 0x0400>;
130 memory-region = <&video_mem>;
131
132 resets = <&gcc GCC_VIDEO_AXI0_CLK_ARES
133 <&videocc VIDEO_CC_MVS0C_CLK_
134 reset-names = "bus", "core";
135
136 video-decoder {
137 compatible = "venus-decoder";
138 };
139
140 video-encoder {
141 compatible = "venus-encoder";
142 };
143 };
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