1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-C 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
2 %YAML 1.2 2 %YAML 1.2
3 --- 3 ---
4 $id: http://devicetree.org/schemas/media/renes 4 $id: http://devicetree.org/schemas/media/renesas,vsp1.yaml#
5 $schema: http://devicetree.org/meta-schemas/co 5 $schema: http://devicetree.org/meta-schemas/core.yaml#
6 6
7 title: Renesas VSP Video Processing Engine 7 title: Renesas VSP Video Processing Engine
8 8
9 maintainers: 9 maintainers:
10 - Laurent Pinchart <laurent.pinchart@ideasonb 10 - Laurent Pinchart <laurent.pinchart@ideasonboard.com>
11 11
12 description: 12 description:
13 The VSP is a video processing engine that su 13 The VSP is a video processing engine that supports up-/down-scaling, alpha
14 blending, color space conversion and various 14 blending, color space conversion and various other image processing features.
15 It can be found in the Renesas R-Car Gen2, R 15 It can be found in the Renesas R-Car Gen2, R-Car Gen3, RZ/G1, and RZ/G2 SoCs.
16 16
17 properties: 17 properties:
18 compatible: 18 compatible:
19 oneOf: !! 19 enum:
20 - enum: !! 20 - renesas,vsp1 # R-Car Gen2 and RZ/G1
21 - renesas,r9a07g044-vsp2 # RZ/G2L !! 21 - renesas,vsp2 # R-Car Gen3 and RZ/G2
22 - renesas,vsp1 # R-Car Gen2 and RZ/G <<
23 - renesas,vsp2 # R-Car Gen3 and RZ/G <<
24 - items: <<
25 - enum: <<
26 - renesas,r9a07g043u-vsp2 # RZ <<
27 - renesas,r9a07g054-vsp2 # RZ <<
28 - const: renesas,r9a07g044-vsp2 # RZ <<
29 22
30 reg: 23 reg:
31 maxItems: 1 24 maxItems: 1
32 25
33 interrupts: 26 interrupts:
34 maxItems: 1 27 maxItems: 1
35 28
36 clocks: true !! 29 clocks:
37 clock-names: true !! 30 maxItems: 1
38 31
39 power-domains: 32 power-domains:
40 maxItems: 1 33 maxItems: 1
41 34
42 resets: 35 resets:
43 maxItems: 1 36 maxItems: 1
44 37
45 renesas,fcp: 38 renesas,fcp:
46 $ref: /schemas/types.yaml#/definitions/pha 39 $ref: /schemas/types.yaml#/definitions/phandle
47 description: 40 description:
48 A phandle referencing the FCP that handl 41 A phandle referencing the FCP that handles memory accesses for the VSP.
49 42
50 required: 43 required:
51 - compatible 44 - compatible
52 - reg 45 - reg
53 - interrupts 46 - interrupts
54 - clocks 47 - clocks
55 - power-domains 48 - power-domains
56 - resets 49 - resets
57 50
58 additionalProperties: false 51 additionalProperties: false
59 52
60 allOf: !! 53 if:
61 - if: !! 54 properties:
62 properties: !! 55 compatible:
63 compatible: !! 56 items:
64 contains: !! 57 - const: renesas,vsp1
65 const: renesas,vsp1 !! 58 then:
66 then: !! 59 properties:
67 properties: !! 60 renesas,fcp: false
68 renesas,fcp: false !! 61 else:
69 else: !! 62 required:
70 required: !! 63 - renesas,fcp
71 - renesas,fcp <<
72 <<
73 - if: <<
74 properties: <<
75 compatible: <<
76 contains: <<
77 const: renesas,r9a07g044-vsp2 <<
78 then: <<
79 properties: <<
80 clocks: <<
81 items: <<
82 - description: Main clock <<
83 - description: Register access clo <<
84 - description: Video clock <<
85 clock-names: <<
86 items: <<
87 - const: aclk <<
88 - const: pclk <<
89 - const: vclk <<
90 required: <<
91 - clock-names <<
92 else: <<
93 properties: <<
94 clocks: <<
95 maxItems: 1 <<
96 clock-names: false <<
97 64
98 examples: 65 examples:
99 # R8A7790 (R-Car H2) VSP1-S 66 # R8A7790 (R-Car H2) VSP1-S
100 - | 67 - |
101 #include <dt-bindings/clock/renesas-cpg-ms 68 #include <dt-bindings/clock/renesas-cpg-mssr.h>
102 #include <dt-bindings/interrupt-controller 69 #include <dt-bindings/interrupt-controller/arm-gic.h>
103 #include <dt-bindings/power/r8a7790-sysc.h 70 #include <dt-bindings/power/r8a7790-sysc.h>
104 71
105 vsp@fe928000 { 72 vsp@fe928000 {
106 compatible = "renesas,vsp1"; 73 compatible = "renesas,vsp1";
107 reg = <0xfe928000 0x8000>; 74 reg = <0xfe928000 0x8000>;
108 interrupts = <GIC_SPI 267 IRQ_TYPE_LEV 75 interrupts = <GIC_SPI 267 IRQ_TYPE_LEVEL_HIGH>;
109 clocks = <&cpg CPG_MOD 131>; 76 clocks = <&cpg CPG_MOD 131>;
110 power-domains = <&sysc R8A7790_PD_ALWA 77 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
111 resets = <&cpg 131>; 78 resets = <&cpg 131>;
112 }; 79 };
113 80
114 # R8A77951 (R-Car H3) VSP2-BC 81 # R8A77951 (R-Car H3) VSP2-BC
115 - | 82 - |
116 #include <dt-bindings/clock/renesas-cpg-ms 83 #include <dt-bindings/clock/renesas-cpg-mssr.h>
117 #include <dt-bindings/interrupt-controller 84 #include <dt-bindings/interrupt-controller/arm-gic.h>
118 #include <dt-bindings/power/r8a7795-sysc.h 85 #include <dt-bindings/power/r8a7795-sysc.h>
119 86
120 vsp@fe920000 { 87 vsp@fe920000 {
121 compatible = "renesas,vsp2"; 88 compatible = "renesas,vsp2";
122 reg = <0xfe920000 0x8000>; 89 reg = <0xfe920000 0x8000>;
123 interrupts = <GIC_SPI 465 IRQ_TYPE_LEV 90 interrupts = <GIC_SPI 465 IRQ_TYPE_LEVEL_HIGH>;
124 clocks = <&cpg CPG_MOD 624>; 91 clocks = <&cpg CPG_MOD 624>;
125 power-domains = <&sysc R8A7795_PD_A3VP 92 power-domains = <&sysc R8A7795_PD_A3VP>;
126 resets = <&cpg 624>; 93 resets = <&cpg 624>;
127 94
128 renesas,fcp = <&fcpvb1>; 95 renesas,fcp = <&fcpvb1>;
129 }; 96 };
130 ... 97 ...
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