1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-C 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
2 %YAML 1.2 2 %YAML 1.2
3 --- 3 ---
4 $id: http://devicetree.org/schemas/media/renes 4 $id: http://devicetree.org/schemas/media/renesas,vsp1.yaml#
5 $schema: http://devicetree.org/meta-schemas/co 5 $schema: http://devicetree.org/meta-schemas/core.yaml#
6 6
7 title: Renesas VSP Video Processing Engine 7 title: Renesas VSP Video Processing Engine
8 8
9 maintainers: 9 maintainers:
10 - Laurent Pinchart <laurent.pinchart@ideasonb 10 - Laurent Pinchart <laurent.pinchart@ideasonboard.com>
11 11
12 description: 12 description:
13 The VSP is a video processing engine that su 13 The VSP is a video processing engine that supports up-/down-scaling, alpha
14 blending, color space conversion and various 14 blending, color space conversion and various other image processing features.
15 It can be found in the Renesas R-Car Gen2, R 15 It can be found in the Renesas R-Car Gen2, R-Car Gen3, RZ/G1, and RZ/G2 SoCs.
16 16
17 properties: 17 properties:
18 compatible: 18 compatible:
19 oneOf: 19 oneOf:
20 - enum: 20 - enum:
21 - renesas,r9a07g044-vsp2 # RZ/G2L 21 - renesas,r9a07g044-vsp2 # RZ/G2L
22 - renesas,vsp1 # R-Car Gen2 and RZ/G 22 - renesas,vsp1 # R-Car Gen2 and RZ/G1
23 - renesas,vsp2 # R-Car Gen3 and RZ/G 23 - renesas,vsp2 # R-Car Gen3 and RZ/G2
24 - items: 24 - items:
25 - enum: 25 - enum:
26 - renesas,r9a07g043u-vsp2 # RZ <<
27 - renesas,r9a07g054-vsp2 # RZ 26 - renesas,r9a07g054-vsp2 # RZ/V2L
28 - const: renesas,r9a07g044-vsp2 # RZ 27 - const: renesas,r9a07g044-vsp2 # RZ/G2L fallback
29 28
30 reg: 29 reg:
31 maxItems: 1 30 maxItems: 1
32 31
33 interrupts: 32 interrupts:
34 maxItems: 1 33 maxItems: 1
35 34
36 clocks: true 35 clocks: true
37 clock-names: true 36 clock-names: true
38 37
39 power-domains: 38 power-domains:
40 maxItems: 1 39 maxItems: 1
41 40
42 resets: 41 resets:
43 maxItems: 1 42 maxItems: 1
44 43
45 renesas,fcp: 44 renesas,fcp:
46 $ref: /schemas/types.yaml#/definitions/pha 45 $ref: /schemas/types.yaml#/definitions/phandle
47 description: 46 description:
48 A phandle referencing the FCP that handl 47 A phandle referencing the FCP that handles memory accesses for the VSP.
49 48
50 required: 49 required:
51 - compatible 50 - compatible
52 - reg 51 - reg
53 - interrupts 52 - interrupts
54 - clocks 53 - clocks
55 - power-domains 54 - power-domains
56 - resets 55 - resets
57 56
58 additionalProperties: false 57 additionalProperties: false
59 58
60 allOf: 59 allOf:
61 - if: 60 - if:
62 properties: 61 properties:
63 compatible: 62 compatible:
64 contains: 63 contains:
65 const: renesas,vsp1 64 const: renesas,vsp1
66 then: 65 then:
67 properties: 66 properties:
68 renesas,fcp: false 67 renesas,fcp: false
69 else: 68 else:
70 required: 69 required:
71 - renesas,fcp 70 - renesas,fcp
72 71
73 - if: 72 - if:
74 properties: 73 properties:
75 compatible: 74 compatible:
76 contains: 75 contains:
77 const: renesas,r9a07g044-vsp2 76 const: renesas,r9a07g044-vsp2
78 then: 77 then:
79 properties: 78 properties:
80 clocks: 79 clocks:
81 items: 80 items:
82 - description: Main clock 81 - description: Main clock
83 - description: Register access clo 82 - description: Register access clock
84 - description: Video clock 83 - description: Video clock
85 clock-names: 84 clock-names:
86 items: 85 items:
87 - const: aclk 86 - const: aclk
88 - const: pclk 87 - const: pclk
89 - const: vclk 88 - const: vclk
90 required: 89 required:
91 - clock-names 90 - clock-names
92 else: 91 else:
93 properties: 92 properties:
94 clocks: 93 clocks:
95 maxItems: 1 94 maxItems: 1
96 clock-names: false 95 clock-names: false
97 96
98 examples: 97 examples:
99 # R8A7790 (R-Car H2) VSP1-S 98 # R8A7790 (R-Car H2) VSP1-S
100 - | 99 - |
101 #include <dt-bindings/clock/renesas-cpg-ms 100 #include <dt-bindings/clock/renesas-cpg-mssr.h>
102 #include <dt-bindings/interrupt-controller 101 #include <dt-bindings/interrupt-controller/arm-gic.h>
103 #include <dt-bindings/power/r8a7790-sysc.h 102 #include <dt-bindings/power/r8a7790-sysc.h>
104 103
105 vsp@fe928000 { 104 vsp@fe928000 {
106 compatible = "renesas,vsp1"; 105 compatible = "renesas,vsp1";
107 reg = <0xfe928000 0x8000>; 106 reg = <0xfe928000 0x8000>;
108 interrupts = <GIC_SPI 267 IRQ_TYPE_LEV 107 interrupts = <GIC_SPI 267 IRQ_TYPE_LEVEL_HIGH>;
109 clocks = <&cpg CPG_MOD 131>; 108 clocks = <&cpg CPG_MOD 131>;
110 power-domains = <&sysc R8A7790_PD_ALWA 109 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
111 resets = <&cpg 131>; 110 resets = <&cpg 131>;
112 }; 111 };
113 112
114 # R8A77951 (R-Car H3) VSP2-BC 113 # R8A77951 (R-Car H3) VSP2-BC
115 - | 114 - |
116 #include <dt-bindings/clock/renesas-cpg-ms 115 #include <dt-bindings/clock/renesas-cpg-mssr.h>
117 #include <dt-bindings/interrupt-controller 116 #include <dt-bindings/interrupt-controller/arm-gic.h>
118 #include <dt-bindings/power/r8a7795-sysc.h 117 #include <dt-bindings/power/r8a7795-sysc.h>
119 118
120 vsp@fe920000 { 119 vsp@fe920000 {
121 compatible = "renesas,vsp2"; 120 compatible = "renesas,vsp2";
122 reg = <0xfe920000 0x8000>; 121 reg = <0xfe920000 0x8000>;
123 interrupts = <GIC_SPI 465 IRQ_TYPE_LEV 122 interrupts = <GIC_SPI 465 IRQ_TYPE_LEVEL_HIGH>;
124 clocks = <&cpg CPG_MOD 624>; 123 clocks = <&cpg CPG_MOD 624>;
125 power-domains = <&sysc R8A7795_PD_A3VP 124 power-domains = <&sysc R8A7795_PD_A3VP>;
126 resets = <&cpg 624>; 125 resets = <&cpg 624>;
127 126
128 renesas,fcp = <&fcpvb1>; 127 renesas,fcp = <&fcpvb1>;
129 }; 128 };
130 ... 129 ...
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