1 # SPDX-License-Identifier: GPL-2.0-only OR BSD 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
2 %YAML 1.2 2 %YAML 1.2
3 --- 3 ---
4 $id: http://devicetree.org/schemas/media/samsu 4 $id: http://devicetree.org/schemas/media/samsung,exynos4210-fimc.yaml#
5 $schema: http://devicetree.org/meta-schemas/co 5 $schema: http://devicetree.org/meta-schemas/core.yaml#
6 6
7 title: Samsung S5P/Exynos SoC Fully Integrated 7 title: Samsung S5P/Exynos SoC Fully Integrated Mobile Camera
8 8
9 maintainers: 9 maintainers:
10 - Krzysztof Kozlowski <krzysztof.kozlowski@li 10 - Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
11 - Sylwester Nawrocki <s.nawrocki@samsung.com> 11 - Sylwester Nawrocki <s.nawrocki@samsung.com>
12 12
13 description: 13 description:
14 Each FIMC device should have an alias in the 14 Each FIMC device should have an alias in the aliases node, in the form of
15 fimc<n>, where <n> is an integer specifying 15 fimc<n>, where <n> is an integer specifying the IP block instance.
16 16
17 properties: 17 properties:
18 compatible: 18 compatible:
19 enum: 19 enum:
20 - samsung,exynos4210-fimc 20 - samsung,exynos4210-fimc
21 - samsung,exynos4212-fimc 21 - samsung,exynos4212-fimc
22 - samsung,s5pv210-fimc 22 - samsung,s5pv210-fimc
23 23
24 reg: 24 reg:
25 maxItems: 1 25 maxItems: 1
26 26
27 clocks: 27 clocks:
28 maxItems: 2 28 maxItems: 2
29 29
30 clock-names: 30 clock-names:
31 items: 31 items:
32 - const: fimc 32 - const: fimc
33 - const: sclk_fimc 33 - const: sclk_fimc
34 34
35 clock-frequency: 35 clock-frequency:
36 description: 36 description:
37 Maximum FIMC local clock (LCLK) frequenc 37 Maximum FIMC local clock (LCLK) frequency.
38 38
39 interrupts: 39 interrupts:
40 maxItems: 1 40 maxItems: 1
41 41
42 iommus: 42 iommus:
43 maxItems: 1 43 maxItems: 1
44 44
45 power-domains: 45 power-domains:
46 maxItems: 1 46 maxItems: 1
47 47
48 samsung,cam-if: 48 samsung,cam-if:
49 type: boolean 49 type: boolean
50 description: 50 description:
51 The FIMC IP block includes the camera in 51 The FIMC IP block includes the camera input interface.
52 52
53 samsung,isp-wb: 53 samsung,isp-wb:
54 type: boolean 54 type: boolean
55 description: | 55 description: |
56 The FIMC IP block has the ISP writeback 56 The FIMC IP block has the ISP writeback input.
57 57
58 samsung,lcd-wb: 58 samsung,lcd-wb:
59 type: boolean 59 type: boolean
60 description: | 60 description: |
61 The FIMC IP block has the LCD writeback 61 The FIMC IP block has the LCD writeback input.
62 62
63 samsung,mainscaler-ext: 63 samsung,mainscaler-ext:
64 type: boolean 64 type: boolean
65 description: 65 description:
66 FIMC IP supports extended image size and 66 FIMC IP supports extended image size and has CIEXTEN register.
67 67
68 samsung,min-pix-alignment: 68 samsung,min-pix-alignment:
69 $ref: /schemas/types.yaml#/definitions/uin 69 $ref: /schemas/types.yaml#/definitions/uint32-array
70 items: 70 items:
71 - description: Minimum supported image h 71 - description: Minimum supported image height alignment.
72 - description: Horizontal image offset. 72 - description: Horizontal image offset.
73 description: 73 description:
74 The values are in pixels and default is 74 The values are in pixels and default is <2 1>.
75 75
76 samsung,min-pix-sizes: 76 samsung,min-pix-sizes:
77 $ref: /schemas/types.yaml#/definitions/uin 77 $ref: /schemas/types.yaml#/definitions/uint32-array
78 maxItems: 2 78 maxItems: 2
79 description: | 79 description: |
80 An array specifying minimum image size i 80 An array specifying minimum image size in pixels at the FIMC input and
81 output DMA, in the first and second cell 81 output DMA, in the first and second cell respectively. Default value
82 is <16 16>. 82 is <16 16>.
83 83
84 samsung,pix-limits: 84 samsung,pix-limits:
85 $ref: /schemas/types.yaml#/definitions/uin 85 $ref: /schemas/types.yaml#/definitions/uint32-array
86 maxItems: 4 86 maxItems: 4
87 description: | 87 description: |
88 An array of maximum supported image size 88 An array of maximum supported image sizes in pixels, for details refer to
89 Table 2-1 in the S5PV210 SoC User Manual 89 Table 2-1 in the S5PV210 SoC User Manual. The meaning of each cell is as
90 follows: 90 follows:
91 0 - scaler input horizontal size 91 0 - scaler input horizontal size
92 1 - input horizontal size for the scale 92 1 - input horizontal size for the scaler bypassed
93 2 - REAL_WIDTH without input rotation 93 2 - REAL_WIDTH without input rotation
94 3 - REAL_HEIGHT with input rotation 94 3 - REAL_HEIGHT with input rotation
95 95
96 samsung,rotators: 96 samsung,rotators:
97 $ref: /schemas/types.yaml#/definitions/uin 97 $ref: /schemas/types.yaml#/definitions/uint32
98 default: 0x11 98 default: 0x11
99 description: | 99 description: |
100 A bitmask specifying whether this IP has 100 A bitmask specifying whether this IP has the input and the output
101 rotator. Bits 4 and 0 correspond to inpu 101 rotator. Bits 4 and 0 correspond to input and output rotator
102 respectively. If a rotator is present it 102 respectively. If a rotator is present its corresponding bit should be
103 set. 103 set.
104 104
105 samsung,sysreg: 105 samsung,sysreg:
106 $ref: /schemas/types.yaml#/definitions/pha 106 $ref: /schemas/types.yaml#/definitions/phandle
107 description: 107 description:
108 System Registers (SYSREG) node. 108 System Registers (SYSREG) node.
109 109
110 required: 110 required:
111 - compatible 111 - compatible
112 - reg 112 - reg
113 - clocks 113 - clocks
114 - clock-names 114 - clock-names
115 - samsung,pix-limits 115 - samsung,pix-limits
116 116
117 allOf: 117 allOf:
118 - if: 118 - if:
119 required: 119 required:
120 - samsung,isp-wb 120 - samsung,isp-wb
121 then: 121 then:
122 required: 122 required:
123 - samsung,sysreg 123 - samsung,sysreg
124 124
125 additionalProperties: false 125 additionalProperties: false
126 126
127 examples: 127 examples:
128 - | 128 - |
129 #include <dt-bindings/clock/exynos4.h> 129 #include <dt-bindings/clock/exynos4.h>
130 #include <dt-bindings/interrupt-controller 130 #include <dt-bindings/interrupt-controller/arm-gic.h>
131 131
132 fimc@11800000 { 132 fimc@11800000 {
133 compatible = "samsung,exynos4212-fimc" 133 compatible = "samsung,exynos4212-fimc";
134 reg = <0x11800000 0x1000>; 134 reg = <0x11800000 0x1000>;
135 clocks = <&clock CLK_FIMC0>, 135 clocks = <&clock CLK_FIMC0>,
136 <&clock CLK_SCLK_FIMC0>; 136 <&clock CLK_SCLK_FIMC0>;
137 clock-names = "fimc", "sclk_fimc"; 137 clock-names = "fimc", "sclk_fimc";
138 interrupts = <GIC_SPI 84 IRQ_TYPE_LEVE 138 interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>;
139 iommus = <&sysmmu_fimc0>; 139 iommus = <&sysmmu_fimc0>;
140 power-domains = <&pd_cam>; 140 power-domains = <&pd_cam>;
141 samsung,sysreg = <&sys_reg>; 141 samsung,sysreg = <&sys_reg>;
142 142
143 samsung,pix-limits = <4224 8192 1920 4 143 samsung,pix-limits = <4224 8192 1920 4224>;
144 samsung,mainscaler-ext; 144 samsung,mainscaler-ext;
145 samsung,isp-wb; 145 samsung,isp-wb;
146 samsung,cam-if; 146 samsung,cam-if;
147 147
148 assigned-clocks = <&clock CLK_MOUT_FIM 148 assigned-clocks = <&clock CLK_MOUT_FIMC0>,
149 <&clock CLK_SCLK_FIM 149 <&clock CLK_SCLK_FIMC0>;
150 assigned-clock-parents = <&clock CLK_M 150 assigned-clock-parents = <&clock CLK_MOUT_MPLL_USER_T>;
151 assigned-clock-rates = <0>, <176000000 151 assigned-clock-rates = <0>, <176000000>;
152 }; 152 };
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