1 DT bindings for Xilinx video IP cores 1 DT bindings for Xilinx video IP cores
2 ------------------------------------- 2 -------------------------------------
3 3
4 Xilinx video IP cores process video streams by 4 Xilinx video IP cores process video streams by acting as video sinks and/or
5 sources. They are connected by links through t 5 sources. They are connected by links through their input and output ports,
6 creating a video pipeline. 6 creating a video pipeline.
7 7
8 Each video IP core is represented by an AMBA b 8 Each video IP core is represented by an AMBA bus child node in the device
9 tree using bindings documented in this directo 9 tree using bindings documented in this directory. Connections between the IP
10 cores are represented as defined in ../video-i 10 cores are represented as defined in ../video-interfaces.txt.
11 11
12 The whole pipeline is represented by an AMBA 12 The whole pipeline is represented by an AMBA bus child node in the device
13 tree using bindings documented in ./xlnx,video 13 tree using bindings documented in ./xlnx,video.txt.
14 14
15 Common properties 15 Common properties
16 ----------------- 16 -----------------
17 17
18 The following properties are common to all Xil 18 The following properties are common to all Xilinx video IP cores.
19 19
20 - xlnx,video-format: This property represents 20 - xlnx,video-format: This property represents a video format transmitted on an
21 AXI bus between video IP cores, using its VF 21 AXI bus between video IP cores, using its VF code as defined in "AXI4-Stream
22 Video IP and System Design Guide" [UG934]. H 22 Video IP and System Design Guide" [UG934]. How the format relates to the IP
23 core is described in the IP core bindings do !! 23 core is decribed in the IP core bindings documentation.
24 24
25 - xlnx,video-width: This property qualifies th 25 - xlnx,video-width: This property qualifies the video format with the sample
26 width expressed as a number of bits per pixe 26 width expressed as a number of bits per pixel component. All components must
27 use the same width. 27 use the same width.
28 28
29 - xlnx,cfa-pattern: When the video format is s 29 - xlnx,cfa-pattern: When the video format is set to Mono/Sensor, this property
30 describes the sensor's color filter array pa 30 describes the sensor's color filter array pattern. Supported values are
31 "bggr", "gbrg", "grbg", "rggb" and "mono". I 31 "bggr", "gbrg", "grbg", "rggb" and "mono". If not specified, the pattern
32 defaults to "mono". 32 defaults to "mono".
33 33
34 34
35 [UG934] https://www.xilinx.com/support/documen !! 35 [UG934] http://www.xilinx.com/support/documentation/ip_documentation/axi_videoip/v1_0/ug934_axi_videoIP.pdf
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