1 # SPDX-License-Identifier: GPL-2.0 1 # SPDX-License-Identifier: GPL-2.0
2 %YAML 1.2 2 %YAML 1.2
3 --- 3 ---
4 $id: http://devicetree.org/schemas/mfd/aspeed, 4 $id: http://devicetree.org/schemas/mfd/aspeed,ast2x00-scu.yaml#
5 $schema: http://devicetree.org/meta-schemas/co 5 $schema: http://devicetree.org/meta-schemas/core.yaml#
6 6
7 title: Aspeed System Control Unit 7 title: Aspeed System Control Unit
8 8
9 description: 9 description:
10 The Aspeed System Control Unit manages the g 10 The Aspeed System Control Unit manages the global behaviour of the SoC,
11 configuring elements such as clocks, pinmux, 11 configuring elements such as clocks, pinmux, and reset.
12 12
13 maintainers: 13 maintainers:
14 - Joel Stanley <joel@jms.id.au> 14 - Joel Stanley <joel@jms.id.au>
15 - Andrew Jeffery <andrew@aj.id.au> 15 - Andrew Jeffery <andrew@aj.id.au>
16 16
17 properties: 17 properties:
18 compatible: 18 compatible:
19 items: 19 items:
20 - enum: 20 - enum:
21 - aspeed,ast2400-scu 21 - aspeed,ast2400-scu
22 - aspeed,ast2500-scu 22 - aspeed,ast2500-scu
23 - aspeed,ast2600-scu 23 - aspeed,ast2600-scu
24 - const: syscon 24 - const: syscon
25 - const: simple-mfd 25 - const: simple-mfd
26 26
27 reg: 27 reg:
28 maxItems: 1 28 maxItems: 1
29 29
30 ranges: true 30 ranges: true
31 31
32 '#address-cells': 32 '#address-cells':
33 const: 1 33 const: 1
34 34
35 '#size-cells': 35 '#size-cells':
36 const: 1 36 const: 1
37 37
38 '#clock-cells': 38 '#clock-cells':
39 const: 1 39 const: 1
40 40
41 '#reset-cells': 41 '#reset-cells':
42 const: 1 42 const: 1
43 43
44 patternProperties: 44 patternProperties:
45 '^p2a-control@[0-9a-f]+$': 45 '^p2a-control@[0-9a-f]+$':
46 description: See Documentation/devicetree/ 46 description: See Documentation/devicetree/bindings/misc/aspeed-p2a-ctrl.txt
47 type: object 47 type: object
48 48
49 '^pinctrl(@[0-9a-f]+)?$': 49 '^pinctrl(@[0-9a-f]+)?$':
50 type: object !! 50 oneOf:
51 additionalProperties: true !! 51 - $ref: /schemas/pinctrl/aspeed,ast2400-pinctrl.yaml
52 properties: !! 52 - $ref: /schemas/pinctrl/aspeed,ast2500-pinctrl.yaml
53 compatible: !! 53 - $ref: /schemas/pinctrl/aspeed,ast2600-pinctrl.yaml
54 contains: <<
55 enum: <<
56 - aspeed,ast2400-pinctrl <<
57 - aspeed,ast2500-pinctrl <<
58 - aspeed,ast2600-pinctrl <<
59 <<
60 required: <<
61 - compatible <<
62 54
63 '^interrupt-controller@[0-9a-f]+$': 55 '^interrupt-controller@[0-9a-f]+$':
64 description: See Documentation/devicetree/ 56 description: See Documentation/devicetree/bindings/interrupt-controller/aspeed,ast2xxx-scu-ic.txt
65 type: object 57 type: object
66 58
67 '^silicon-id@[0-9a-f]+$': 59 '^silicon-id@[0-9a-f]+$':
68 description: Unique hardware silicon ident 60 description: Unique hardware silicon identifiers within the SoC
69 type: object 61 type: object
70 additionalProperties: false 62 additionalProperties: false
71 63
72 properties: 64 properties:
73 compatible: 65 compatible:
74 items: 66 items:
75 - enum: 67 - enum:
76 - aspeed,ast2400-silicon-id 68 - aspeed,ast2400-silicon-id
77 - aspeed,ast2500-silicon-id 69 - aspeed,ast2500-silicon-id
78 - aspeed,ast2600-silicon-id 70 - aspeed,ast2600-silicon-id
79 - const: aspeed,silicon-id 71 - const: aspeed,silicon-id
80 72
81 reg: 73 reg:
82 description: 74 description:
83 The reg should be the unique silicon 75 The reg should be the unique silicon id register, and not backwards
84 compatible one in eg. the 2600. 76 compatible one in eg. the 2600.
85 minItems: 1 77 minItems: 1
86 items: 78 items:
87 - description: silicon id informatio 79 - description: silicon id information registers
88 - description: unique chip id regist 80 - description: unique chip id registers
89 81
90 required: 82 required:
91 - compatible 83 - compatible
92 - reg 84 - reg
93 - ranges 85 - ranges
94 - '#address-cells' 86 - '#address-cells'
95 - '#size-cells' 87 - '#size-cells'
96 - '#clock-cells' 88 - '#clock-cells'
97 - '#reset-cells' 89 - '#reset-cells'
98 90
99 additionalProperties: false 91 additionalProperties: false
100 92
101 examples: 93 examples:
102 - | 94 - |
103 syscon@1e6e2000 { 95 syscon@1e6e2000 {
104 compatible = "aspeed,ast2400-scu", "sy 96 compatible = "aspeed,ast2400-scu", "syscon", "simple-mfd";
105 reg = <0x1e6e2000 0x1a8>; 97 reg = <0x1e6e2000 0x1a8>;
106 #clock-cells = <1>; 98 #clock-cells = <1>;
107 #reset-cells = <1>; 99 #reset-cells = <1>;
108 100
109 #address-cells = <1>; 101 #address-cells = <1>;
110 #size-cells = <1>; 102 #size-cells = <1>;
111 ranges = <0x0 0x1e6e2000 0x1000>; 103 ranges = <0x0 0x1e6e2000 0x1000>;
112 104
113 silicon-id@7c { 105 silicon-id@7c {
114 compatible = "aspeed,ast2500-silic 106 compatible = "aspeed,ast2500-silicon-id", "aspeed,silicon-id";
115 reg = <0x7c 0x4>, <0x150 0x8>; 107 reg = <0x7c 0x4>, <0x150 0x8>;
116 }; 108 };
117 }; 109 };
118 ... 110 ...
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